He filed the patent from Paris in 1919. That wartime circuit, built for military eavesdropping rather than entertainment, is now the basic architecture inside nearly every AM/FM radio, TV tuner, and the RF front end of a smartphone.

Who was this officer?

CLUES

That wartime circuit is now called the superheterodyne, and it's the basic architecture inside nearly every AM/FM radio, TV tuner, and the RF front end of a smartphone.

That wartime fix is why your car radio can pull in a station from three counties away, and why your phone's radio chip works at all.

SPOILER ALERT: ANSWER BELOW

On 9 July 1962, at a device conference in Durham, New Hampshire, a group from MIT Lincoln Laboratory stood up and said their gallium arsenide junctions were turning very nearly every electron they injected into a photon, with almost none of it wasted as heat. Three of the men listening went home and started building lasers: Robert Hall from General Electric’s lab in Schenectady, Marshall Nathan from IBM, and a GE engineer out of the Syracuse lab called Nick Holonyak.

Hall won the non-race. By the middle of September he had coherent infrared light coming out of a gallium arsenide diode, and Holonyak (who had told an interviewer decades later that he had fully expected to beat everybody), took it about as well as you would expect. He also conceded, every time he was asked, that Hall was a smart guy who simply got there first.

The consolation (for Holonyak) was that Hall’s beam was invisible. So was IBM’s, and Lincoln Lab’s. Every one of those devices emitted in the infrared, which meant you proved you had a laser by pointing it at a detector and reading a trace.

Holonyak wanted one you could look at. Pushing phosphorus into the gallium arsenide lattice widens the bandgap and drags the emission up out of the infrared into red, and he had been growing that alloy for a while, using a trick borrowed from J. C. Marinace at IBM: seal the ingredients in a quartz tube with a halide, heat one end, let the vapor carry the material to the cool end and crystallize there.

The chemists at GE told him the alloy could not be made. Holonyak’s version of that argument is the best thing in the whole story. They were telling him he was crazy in what he called “New York language.”

His mirrors gave him more trouble than his crystals. A diode laser needs two flat parallel faces to bounce light between, and Hall was getting his by polishing. Holonyak tried to cleave his, which works beautifully on a single crystal and not at all on what he actually had. He switched to polishing once he heard what Hall was doing. By then the infrared race was over.

On 9 October 1962, with colleagues watching, he cooled a GaAs₀.₆P₀.₄ diode to 77 kelvin, hit it with pulsed current, and got red laser light.

Aside: Again, not a first; now, not the first red laser. Theodore Maiman’s ruby had done that in 1960, a distinction Holonyak was always careful to draw himself: the first one made of a semiconductor.

Then it warmed up.

At room temperature the lasing collapsed and the diode just sat there glowing, a plain red with no coherence in it at all. GE gave him its Cordiner Award that year - named for the man then running the company - for the laser. Diode lasers would not run at room temperature until 1970, when Herbert Kroemer’s and Zhorev Alferov’s heterojunctions finally made it possible. The useless-looking glow went into production almost immediately and is now in your dashboard, your traffic lights and the indicator on your power strip.

Again, he was not the first person to get light out of a semiconductor. H J Round saw a crystal of silicon carbide glow in 1907. Oleg Losev worked the phenomenon in the Soviet Union through the twenties and thirties, and died with almost nobody in the West having read him. James Biard and Gary Pittman at Texas Instruments filed a patent on an infrared gallium arsenide emitter in August 1962 and had a commercial part on the market that October, the same month as Holonyak’s demonstration. Theirs, again, you could not see. What he produced was the first practical visible one.

Side Quest: Go into the rabbit hole that is the history of the LED.

Reader’s Digest ran a piece in February 1963 under the title “Light of Hope, or Terror.” Harland Manchester had interviewed Holonyak, and the article carried the claim that these things would eventually finish off Edison’s bulb. He was thirty-four and his device only behaved properly in liquid nitrogen. It took about fifty years for him to be proved right.

Holonyak came out of Zeigler, a coal town in southern Illinois. Carpatho-Rusyn parents, a father in the mines, and Holonyak the first in the family to sit in a classroom. At fourteen he assumed he was going underground like most in his town. His father talked him into taking any job that stayed above it, which turned out to be track work on the Illinois Central. Accounts differ on how long that first stretch ran. Holonyak’s own version was that one shift of it settled the question of whether he would work with his back or his head.

At Illinois he became John Bardeen’s first doctoral student, and kept working together until Bardeen died in 1991.

Holonyak collected several awards and accolades: Edison Medal, National Medal of Science, National Medal of Technology, Japan Prize, IEEE Medal of Honor, Draper, Queen Elizabeth Prize. Asked about the Nobel earlier on, he had said it was ridiculous to imagine anyone owed you anything. Then in October 2014 the physics prize went to the inventors of the blue LED, and he told the Associated Press he found that one insulting.

He kept turning up at the lab most days of the week until he retired at eighty-four, and Illinois put his name on the building in 2019. The red dot people buy to torment their cats is his grandchild twice over. If it’s a laser, it descends from the half that worked at 77 kelvin, and if it’s just a bright diode behind a lens, which it often is, it descends from the half that quit.

Broadcom is tapping debt markets through a special purpose vehicle, targeting $70 billion to fund a custom AI chip program for Anthropic. Samsung is planning $79 billion in shareholder returns through dividends and buybacks, and TSMC has wrapped 1.6nm development with mass production targeted for Q4.

Let’s get into it. — Austin & Vik

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Broadcom-Backed SPV Eyes $70 Billion in Debt for Anthropic Chips

Broadcom is seeking $60 billion to $70 billion in debt through a special purpose vehicle to fund a custom AI chip program for Anthropic, with CNBC putting the target at $70 billion while Bloomberg News, cited by Reuters, put the floor at more than $60 billion. Proactive Financial News reported the same figure. Digitimes went further, reporting the financing could reach $100 billion as Broadcom expands its chip commitments. The SPV structure keeps the debt separate from Broadcom’s corporate balance sheet. Neither Broadcom nor Anthropic has publicly confirmed the deal’s terms.

Vik: Custom ASIC business still booming as people try to get away from Nvidia. Customer owned tooling is also being actively looked at, but experienced chip designers like Broadcom will have their share of designing chips.

Samsung Plans Record $79 Billion in Shareholder Returns After AI Gains

Samsung Electronics plans to return as much as 110 trillion won ($79 billion) to shareholders this year through dividends and buybacks, the largest investor return program in South Korean history, Bloomberg reported. The company joins SK Hynix, which had already pledged a comparable distribution after a windfall from surging AI chip demand. Both of South Korea’s dominant memory producers are now running concurrent capital return programs of record scale, each channeling profits from the current AI chip upcycle to shareholders. The 110 trillion won figure represents Samsung’s full-year capital return target.

Vik: Memory’s greatest comeback in the AI era, and shareholders are reaping benefits.

TSMC Wraps 1.6nm Development, Targets Q4 Volume; LG Joins Packaging Field

TSMC has completed its 1.6nm chip and is now targeting mass production for Q4, according to Seoul Economic Daily. The milestone lands while TSMC’s CoWoS advanced packaging platform stays supply-constrained, a condition that has drawn new entrants into the field. LG has entered the chip packaging arena with a Laser Direct Imaging machine, a maskless tool purpose-built to pattern fine interconnects by trading resolution for higher throughput, according to Tom’s Hardware. LDI requires no conventional photo masks to function. Tom’s Hardware ties LG’s entry directly to the ongoing CoWoS capacity shortage across advanced packaging.

Vik: Advanced packaging is getting hotter than it already is, and is a common theme I saw at OCP APAC recently. Integration of networking (like CPO) and power (like VPD) is driving a lot of technical innovation.

Nvidia Denies Planning China AI Chip as Export Controls Persist

The Information reported that Nvidia is plotting a China comeback with a new AI chip built to stay within U.S. export control limits, describing Groq-based liquid processing units as the candidate design and year-end as the delivery window. Nvidia rejected the report outright. The company told Reuters and other outlets it has no China-specific LPU product in its roadmap, directly addressing the Groq-based LPU design The Information named. Tom’s Hardware reported the same denial and noted The Information’s account had specified year-end delivery. Export controls that blocked Nvidia’s H20 chip from Chinese buyers remain in place, with no announced change.

Vik: Chinese specific LPU?! Never considered that to be a good buy for Nvidia anyway. Much better options exist, but I think they FOMO-ed their way into that deal.

Japan Adds $940 Million to Rapidus, Backs 600mm Packaging Push

Japan’s government is committing an additional $940 million to Rapidus, the state-backed company building a 2nm fab in Hokkaido with a targeted production start in 2027. The new tranche follows earlier rounds of sovereign funding for a project that has not yet generated commercial revenue. Rapidus is expanding its packaging program alongside the foundry work: TrendForce reports the company targets 600mm panel-level interposers capable of holding eight reticles by 2030, a panel size that hasn’t reached commercial production anywhere. The foundry buildout and packaging roadmap form a single national program. Tokyo has continued to fund both on strategic rather than commercial grounds.

Vik: More advanced packaging investments. This is likely to start paying out sooner for Rapidus than their 2nm development which is much harder.

Zhongji Innolight Profit Surges 2.4 Times; Zayo Secures Long-Term Corning Fiber

Chinese transceiver maker Zhongji Innolight posted H1 2026 net profit of 13 billion yuan, up 2.4 times on the year. Overseas demand drove it. Zayo locked in a long-term fiber reserve pact with Corning, building on an existing supply arrangement to hold committed strand inventory ahead of U.S. AI data center builds. Gaon Cable, an LS Cable & System subsidiary, disclosed on August 20 that its American arm LSCUS had signed a 200 billion won contract to supply busducts for an AI cloud data center project in the United States.

Vik: Zhongji Innolight is a major Chinese transceiver maker, and simply restricting Chinese imports will negatively impact the AI datacenter build out. Most experts stated that they did not expect the bans to materialize anyway.

Sector Watch

Memory

• Micron launches a $10B, decade-long US AI memory research hub targeting next-generation memory architectures for AI workloads. (EE News Europe)

• YMTC‘s parent targets a $4.9B Shanghai IPO, filing the Chinese NAND leader’s first formal public-market fundraise with regulators. (Reuters)

• Primemas targets $200M in revenue by end of 2027 with a CXL memory solution supporting more than 100 TB per server. (The Elec)

Policy & Trade

• Supermicro fired several employees after an internal probe found a $2.5B scheme to supply Nvidia GPUs to China in violation of US export controls, with senior management claiming no knowledge. (Tom’s Hardware)

• South Korea plans a chip windfall fund routing semiconductor sector gains into youth programs and domestic AI infrastructure investment. (Reuters)

• Brazil splits its national AI supercomputer push between Chinese and US vendors, creating a deliberate supply-chain hedge amid great-power tech rivalry. (Reuters)

Data Centers

• Anthropic targets a public offering sized to match or exceed SpaceX’s record IPO, positioning itself as AI’s largest-ever venture-to-public-market transition. (Barron’s)

• Nebius upsizes its AI infrastructure convertible bond to $5B from $4.5B, citing strong institutional demand as it accelerates European and US data center deployment. (Reuters)

• AWS adds a third availability zone to its UK cloud region, expanding redundancy for enterprise and AI workloads in Britain. (Data Center Dynamics)

Compute

• Nvidia is in early acquisition talks with Korean AI inference chip startup Rebellions, per Bloomberg, adding a potential consolidation move to its inference ecosystem. (Bloomberg.com)

• Cambricon advances its sixth-generation AI accelerator, adding native support for DeepSeek, Qwen, and GLM model families ahead of commercial launch. (digitimes)

• Flex and Cerebras scale AI supercomputer manufacturing in California, expanding CS-4 wafer-scale system production to meet inference demand. (Evertiq)

Power & Cooling

• Danfoss forecasts its data center cooling business will at least double its share of group sales in 2026, driven by AI infrastructure spending. (Bloomberg Tech)

• Texas sets a December deadline for grid-impact reviews of data center and crypto interconnection requests to manage surging load growth. (Bloomberg.com)

• Infineon launches 40-V GaN switches that shrink portable power supply footprints by 82%, targeting fast-charge and industrial applications. (Electronic Design)

PCB, Components & Materials

• GIS is building a dedicated MLCC equipment manufacturing base in Gumi in anticipation of expanded orders from Samsung Electro-Mechanics. (The Elec)

• Taesung supplies PCB wet-process equipment to Austria’s AT&S, entering a new export relationship with a leading advanced circuit-board maker. (The Elec)

• Fujifilm is expanding output of key chip-fabrication materials to capture AI-driven demand, adding supply to a tight advanced-node chemicals market. (Bloomberg.com)

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SK Hynix published a co-packaged optics roadmap in Nature Electronics, mapping the path from memory bandwidth to optical interconnect. Waymo has built a custom chip for its robotaxi fleet. Micron is committing $10 billion to a new AI memory research campus in Boise, and Alibaba Cloud grew 45% while profit cratered as CapEx hit $10 billion.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

Tell us how to make Semi Doped better! Give us your feedback! ❤️

SK Hynix Maps CPO Path From Memory Bandwidth to Optical Interconnect

SK Hynix published a co-packaged optics roadmap in Nature Electronics on Aug. 20, framing CPO as the answer to bandwidth and energy bottlenecks that conventional electrical interconnects can no longer solve at AI-scale. The paper, titled “Co-packaged optics for high-performance computing and artificial intelligence,” lays out how photonic integration with memory packages becomes the next systems-level contest as the industry works through the HBM4 and HBM5 generations. That timing collides with a parallel question the industry is still working out: HBM4 introduces a customizable base die, and as Semiconductor Engineering reports, the scarce resource in those custom projects isn’t supply but design teams and tooling. Packaging, interconnect architecture, and supplier relationships are all in play at once. Light, it turns out, is the easy part.

Austin: The memory pooling is interesting. Why limit the amount of HBM to what can be physically packaged with your SOC? Why not just have a local memory pool you can connect to via optics? This gives XPU makers the ability to decide compute:memory ratios at design time. Or easily have a prefill chip with less pooled memory and a decode chip with more.

Note that we’ve seen ideas like this elsewhere, e.g. Marvell/Celestial AI.

Waymo Builds Custom Robotaxi Chip as Automotive Silicon Splits

Alphabet’s Waymo has built a purpose-designed chip for its robotaxi fleet, stepping into the custom silicon business that its hyperscale parent knows well and that rivals like Tesla have already staked out. The move puts Waymo in direct control of its own perception hardware rather than buying off-the-shelf solutions from traditional automotive suppliers. Separately, Renesas has struck a deal with Japan’s Tier IV to run the open-source Autoware stack on R-Car Gen 5 automotive SoCs, pairing the forthcoming processor with Tier IV’s reference AI models for software-defined vehicles. The Renesas arrangement targets the broader OEM market that won’t build its own silicon, offering an integrated platform for automakers that want Autoware without assembling the stack themselves from scratch.

Austin: Waymo had a bit to say, with more details at Hot Chips! The important value prop is the ability to co-design the end-to-end system and reduce “pixels-to-actuation” latency:

Relatedly, see my conversation with Rivian’s VP of ASIC Design about their custom silicon chip to learn more about custom silicon for autonomous vehicles: An Interview with Rivian’s Mukund Chavan About RAP1

Micron Bets $10 Billion on Boise as AI Memory Race Tightens

Micron has unveiled a $10 billion AI memory research campus in Boise, planting a flag in the high-stakes competition to supply the memory stacks that power large-scale AI infrastructure. The investment targets Micron’s persistent gap with SK Hynix in high-bandwidth memory, where Hynix currently holds a commanding lead in HBM3E supply to Nvidia. Boise now enters the conversation alongside Icheon and Hiroshima as a serious advanced-memory R&D address. Micron has simultaneously overtaken Kioxia for third place in global NAND market share, according to reporting on Kioxia’s 2026 capacity outlook. Kioxia, for its part, has its 2026 output already contracted, suggesting the competitive pressure is real but the displaced company isn’t exactly scrambling.

Austin: Love to see it. More investment in memory R&D is essential to keep up with the insane demands of AI. Also on a personal level, this is awesome for EE/Materials Science/etc PhDs. One of the sharpest people in my grad school research group went to Micron after finishing his PhD. Others went to Intel Foundry, a great spot for R&D too.

Alibaba Cloud Jumps 45% but Profit Craters as CapEx Hits $10 Billion

Alibaba’s cloud and AI division grew 45% in the June quarter, pushing overall revenue up 9% and delivering adjusted profit of 27.3 billion yuan, better than analysts expected. The cost of that growth is hard to miss. Quarterly capital expenditure hit nearly $10 billion and net profit fell as the company poured cash into AI infrastructure. Executives told investors on the earnings call that AI computing investments would break even within three years, or possibly two if gross margins kept climbing. Alibaba has outpaced Chinese tech peers this quarter on renewed AI enthusiasm, but the arithmetic for now runs in one direction: revenue accelerating, profits absorbing the blow.

Cerebras Posts Q2 Loss, Raises Full-Year Guidance After CS-4 Launch

Cerebras Systems delivered its first earnings report as a public company with a swing to a second-quarter loss, even as management raised its full-year outlook following the launch of the CS-4 wafer-scale chip. The loss reflects the company’s heavy infrastructure spending as it scales to meet demand, a pattern common in capital-intensive AI hardware builds. Cathie Wood’s ARK Invest moved in the other direction from sellers, purchasing $8.84 million of Cerebras shares after the stock slid roughly 29% from its IPO price. The Callosum partnership, announced around the same period, extends Cerebras inference capacity through third-party API access, adding a distribution channel without requiring additional fab investment. Revenue growth absorbing investment costs remains the core financial story here, and the raised guide suggests management sees that trajectory holding through year-end.

Sector Watch

Compute

• Nvidia plans to ship a new China-compliant AI chip by year-end, according to The Information, marking its first export-rule-cleared product since the H20 ban. (Reuters)

Foundry & Packaging

• JCET reports 79.4% year-on-year growth in H1 2026 net profit and accelerates its advanced packaging expansion in a PR Newswire release. (PR Newswire)

• Synopsys validates a PCIe 6.0 PHY inside a face-to-face 3D stack at 64 GT/s, the first disclosed demonstration of the interconnect standard in a stacked die configuration. (Tom’s Hardware)

• ASML faces a potential US-directed Dutch ban on selling its DUV tools to China, as Washington prepares to pressure the Netherlands for a broader export restriction. (NL Times)

Memory

• Samsung and SK Hynix are preparing shareholder return programs exceeding $72 billion combined, the largest in Korean semiconductor history. (Bloomberg)

• YMTC clears IPO counseling acceptance on the Shanghai exchange, advancing the sanctioned NAND maker’s push toward a domestic listing as its global market share reaches 14%. (digitimes)

• ENF Technology will build a 450 billion won semiconductor materials campus in Yesan, South Chungcheong Province, targeting advanced memory supply chains. (The Elec)

• Soulbrain files plans for an $85.8 million semiconductor-materials plant in Taylor, Texas, deepening its supply position for Samsung’s US fab. (Energies Media)

Data Centers

• CoreWeave and Hudson River Trading sign a multibillion-dollar multiyear deal to power HRT’s AI trading research on Nvidia Vera Rubin hardware. (CoreWeave)

• Nebius prices $5 billion in convertible notes to fund AI data center expansion, its largest single debt raise and part of more than $11 billion raised in under a year. (Blockspace Media)

• Bloom Energy launches a new rapid-deployment platform to cut time-to-power for data center operators, targeting faster fuel-cell installations at AI campuses. (Data Center Dynamics)

Optics & Networking

• Zayo expands its long-term fiber supply agreement with Corning to underpin a 15,000-route-mile AI network buildout across the US. (Broadband Breakfast)

• Relativity Networks raises $22 million and secures a $40 million hyperscaler contract for its hollow-core fiber technology targeting AI interconnect. (Light Reading)

• Charter closes its merger with Cox to create the world’s largest cable operator, passing more than 70 million locations under the Spectrum brand. (Light Reading)

Power

• Nordson posted record Q3 fiscal 2026 results and raised its full-year guidance. (Nordson)

• GlobalFoundries details its 48V power architecture strategy, targeting automotive, industrial, and AI infrastructure customers with its specialized process portfolio. (GlobalFoundries)

• Gaon Cable wins a 200 billion won busduct supply contract for a US AI cloud data center, marking a major infrastructure component win for the LS Cable subsidiary. (The Elec)

PCB & Components

• GIS will build a dedicated MLCC equipment base in Gumi, South Korea, expanding domestic passive component manufacturing capacity for AI and automotive demand. (thelec.net)

• Taesung supplies PCB wet-process equipment to Austria’s AT&S, extending Korean equipment makers’ reach into high-end substrate board manufacturing. (The Elec)

• Wolfspeed reports fiscal Q4 2026 financial results as the SiC power device maker navigates capacity ramp and restructuring amid strong EV and industrial demand. (Wolfspeed)

Analog Devices posted a record $4.02 billion quarter on data center demand. SK Hynix voted to cancel $29 billion in treasury shares, Korea’s largest ever, and Marvell gave Google an option to buy $12.2 billion in shares tied to a TPU chip supply deal. Samsung is also hiking foundry prices up to 15% as TSMC’s CoWoS fills.

Let’s get into it. —Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

Analog Devices Posts Record $4 Billion Quarter on Data Center Demand

Analog Devices reported fiscal third-quarter revenue of $4.02 billion, a company record. Data Center and Industrial led the growth. Trailing twelve-month operating cash flow reached $5.5 billion, equal to 40% of revenue, and the company returned $1.7 billion to shareholders through dividends and buybacks in the period. Semiconductor materials makers broadly recovered profitability in Q2 as AI chip investment lifted demand for advanced materials, with revenue growth expected to accelerate next year as customers expand capacity, according to The Elec. CMTX, a South Korean silicon parts supplier, logged revenue growth for 11 consecutive quarters, the only Kosdaq-listed semiconductor materials, parts, and equipment company to sustain the streak.

Austin: My interest in ADI is Empower. ADI closed the $1.5B all-cash acquisition on July 7, and the CEO Roche is positioning it as the future of power delivery. Next-gen AI chips want thousands of amps at sub-1V, and you can’t push that across a board without paying the I²R tax, so conversion has to move into the package. Catch up on that topic with our earlier podcast: Power as the Next Physics Wall for AI.

Vik: ADI revenue is up 40% and EPS is up 163% YoY. A lot of their earnings is from the industrial sector, military and defense. Not everything can be chalked up to AI.

SK Hynix Plans $29 Billion Buyback, Korea’s Largest Share Cancellation

SK Hynix’s board voted on August 19 to repurchase and fully cancel 40 trillion won ($29 billion) of treasury shares, what the company called the largest treasury share cancellation in South Korean listed-company history. Bond yields have been compressing chip-stock multiples across Korea, Bloomberg reported. SK Hynix attributed the decision to its view that the current share price underrepresents intrinsic value. The program also lifts the shareholder return target from “within 50% of cumulative free cash flow” to “over 50%,” a commitment the company plans to fulfill ahead of the program’s original schedule. Reuters put the dollar total at $28.6 billion, a minor difference from the won conversion rate used.

Vik: SK Hynix has lots of confidence that their share growth will continue. Memory underpins all of AI. Fair assumption.

Marvell Grants Google Option to Buy $12.2 Billion in Shares

Marvell has given Google the right to buy up to $12.2 billion in Marvell shares as part of a TPU chip supply agreement, not as a standalone financial investment. The deal builds on an existing AI chip collaboration in which Marvell develops custom accelerators for Google’s AI infrastructure. Google acquires the right, not the obligation, to take a stake in its chip partner; $12.2 billion sets the ceiling on what it could invest, not what it will. Marvell’s TPU development work sits at the center of the supply arrangement that now carries the equity option.

Austin: The vesting schedule is interesting. About 59M shares, roughly 7% of Marvell, and nearly all of it vests in 240 tranches, one for every $500M of custom-silicon revenue from Google through fiscal 2033. Full vesting takes 240 x $500M = $120B of Google purchases in about six and a half years, call it $18B a year from this one customer.

Vik: This is positive for Marvell CXL too because Google is understood to be buying from them. Marvell’s engagement with Google could pave the way for a $1T company, as Jensen joked at Computex 2026.

Samsung Hikes Foundry Prices Up to 15% as TSMC CoWoS Fills

Samsung has hiked foundry prices up to 15% following a demand spike linked to TSMC’s CoWoS advanced packaging running near its capacity ceiling, per Reuters sources. Customers who can’t get CoWoS slots are rerouting tape-outs. Some volume is landing at Samsung; some is flowing to Intel’s EMIB-T packaging platform as CoWoS access tightens. TrendForce reports that Unimicron and ASE stand to gain substrate and assembly business as the CoWoS crunch drives demand toward EMIB-T. Commonwealth Magazine reports TSMC is developing COUPE as a next-generation successor to CoWoS, with production volume dates not yet publicly disclosed.

Vik: CoWoS crunch and people going to Intel and other packaging houses is not a net negative for TSMC. More chips being packaged means more chips being fabbed.

Cerebras Launches CS-4 Rack to Widen Inference Lead Over Nvidia

Cerebras unveiled the CS-4, its first multi-wafer inference rack, positioning the system as a faster alternative to Nvidia hardware for AI chatbot workloads. Connecting multiple wafer-scale chips in a single unit, the rack pushes inference throughput beyond what any single-wafer system can deliver, Cerebras says. The CS-4 runs on Cerebras’s existing wafer-scale engine: no new chip inside, just more of them, arranged at rack scale. Cerebras claims the system widens its inference speed advantage over Nvidia. The launch arrives as an earnings-driven stock selloff has put fresh pressure on the company, according to The Economic Times.

Austin: This is a thermal, power, and systems iteration, not an architectural improvement. The CS-3 rack had two wafer-scale engines, each with 44GB of SRAM and 900K harvested cores on TSMC 5nm. The CS-4 rack has three wafer-scale engines. Same 44GB of SRAM, same 900K cores, same TSMC 5nm. The extra wafer plus better cooling and power delivery allows higher clocks, so more tokens per second and a bit more compute density per square foot of datacenter. Still an improvement! Props on the system engineering eye-candy:

Vik: I attended the event last minute since I happened to be in SF. These backpacks were cool, and the “engine block” has undergone significant redesign to allow three WFEs to fit in a rack as opposed to two. 50% higher SRAM density per rack. The messaging is more going to rack-scale solutions here; not really new chips.

Sector Watch

Compute

• Cadence Design Systems CEO says 45% of revenue now comes from companies designing their own chips, up from a historically semiconductor-vendor-dominated customer base. (CNBC)

• Etched AI inference chip startup doubles valuation to $21 billion in under a month, marking one of the fastest valuation doublings in the current AI silicon funding wave. (Reuters)

• Velaura AI closes a funding round valuing the chip startup at more than $1 billion, entering the AI silicon design race. (Reuters)

Foundry & Packaging

• Socionext taps Intel 18A-P process for high-performance compute chiplet development, adding a notable ASIC design win to Intel Foundry’s advanced-node customer roster. (digitimes)

• Ajinomoto cuts ABF chip packaging film shipments to China by 30% following Beijing’s rare earth export curbs, accelerating the race to qualify domestic substitutes. (Tom’s Hardware)

• NXP to more than double 300mm back-end semiconductor manufacturing capacity in Malaysia through a new joint-venture facility build. (The Elec)

Nvidia has agreed to provide up to $105 billion in guarantees backing SB Energy’s PORTS-Pike campus in Ohio, a commitment that puts the chipmaker in a financial role well beyond its core hardware business. Anthropic reported a 14-fold jump in second-quarter revenue year-over-year, reinforcing the AI chip demand story, while Groq continues to raise money.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

Nvidia Backs OpenAI Ohio Campus With $105 Billion Guarantee

Nvidia is taking on a financial role that stretches well beyond selling chips. The company has agreed to provide up to $105 billion in guarantees backing SB Energy’s PORTS-Pike campus in Ohio, which OpenAI will use as its primary AI compute facility. Nvidia is simultaneously taking a $1.5 billion equity stake in SB Energy, the SoftBank-linked data center developer building the project. CEO Jensen Huang told investors the campus could generate $600 billion in revenue over its lifetime, a projection that helps explain why Nvidia is willing to tie its balance sheet to the deal’s financing.

The arrangement gives Nvidia exclusive chip placement at the site in exchange for its credit support, per Digitimes, essentially swapping financial guarantees for guaranteed sales. That structure is what’s drawing scrutiny: Bloomberg reports Nvidia is actively calling on Wall Street to help finance the AI buildout as customer acquisition costs rise alongside chip prices. The circular-finance question, raised by Chosunbiz among others, is straightforward: Nvidia guarantees the debt that funds the infrastructure that buys Nvidia chips. The Ohio campus reportedly spans up to 10 gigawatts of capacity.

Anthropic’s 14-Fold Revenue Surge Anchors AI Chip Demand Before IPO

Anthropic disclosed to prospective investors that its second-quarter revenue jumped at least 14-fold versus the same period a year ago, with Bloomberg reporting the figure came in at more than $11.5 billion for Q2 alone. The disclosure, contained in documents seen by Bloomberg News, arrived as the company builds toward a public listing. Its annualized revenue run rate has now surpassed $65 billion, up more than sevenfold from its pace at the end of last year. That trajectory gave AI infrastructure investors something concrete to price: shares of chip and datacenter names edged higher in the US session, while EU chip stocks posted a sharper move on the news.

The revenue figures carry weight beyond Anthropic’s own valuation because they land directly against hyperscaler CapEx narratives, offering demand-side evidence that accelerator spending has a paying customer base behind it. Bloomberg’s Rachel Metz noted the figures invite direct comparison with OpenAI’s growth trajectory, framing the two as the clearest gauges of frontier-model commercialization. The IPO roadshow hasn’t formally begun, but the pre-marketing disclosure already has family offices and institutional investors recalibrating exposure to the AI infrastructure stack sitting beneath Claude’s revenue line.

Vik: We are about to witness the largest IPO in history pretty soon. So much will be known about the inner workings of Anthropic then. Looking forward!

Groq Raises $350M at Half Last Year’s Valuation, With Nvidia in the Round

Groq closed a $350 million Series A on Monday, led by Disruptive, with planned participation from Nvidia. The raise values the company at $3.5 billion. Add the $650 million from June and recent funding is $1 billion. That $3.5 billion is about half the $6.9 billion Groq commanded last September, a few months before Nvidia hired founder Jonathan Ross and other key people as part of a $20 billion licensing deal paid out to investors. Groq told TechCrunch it does not see a down round. It sees a new price for the post-licensing company.

Read the use of proceeds. The money is for “those seeking usage of medium and larger sized clusters of NVIDIA accelerated computing for training and inference.” Groq is an Nvidia Cloud Partner. It runs 13 data centers, claims more than six million developers, and wants to go from 54 megawatts to more than 200 megawatts in 2027. Alex Davis, Disruptive’s CEO and Groq’s executive chairman, said they are building “the world’s leading AI inference cloud.” The LPU story is not the fundraising story anymore.

This is the conversion of an inference-silicon challenger into another Nvidia-attached neocloud. Cerebras is the one with a named frontier model on wafers this month. Groq is raising to buy the stack it used to compete with. The open question is the same one CoreWeave already lives with: inference demand is real, and the returns on a leveraged GPU fleet are still a credit story, not a transistor story. (Bloomberg)

Vik: Crazy they are still raising money after Nvidia’s $20B acquihire!

Sector Watch

Foundry & Packaging

• Sony and TSMC sign definitive 747 billion yen deal for a new Kumamoto sensor fab, with volume production targeted for 2029. (CineD)

• Shinko Electric advances 22-layer glass substrate development as Samsung Electro-Mechanics faces ramp-up uncertainty on the same technology. (LEDinside)

• Hanmi Semiconductor invests 130 billion won to build its largest-ever Plant 8 on a new Incheon site, expanding TC bonding capacity for AI packaging demand. (Chosunbiz)

Data Centers & Power

• Trane Technologies and Eaton launch an industry-first integrated power-and-cooling reference design for AI data centers, co-developed with Nvidia, cutting installation costs and deployment time. (Business Wire)

• Nebius switches its New Jersey AI data center from gas turbines to Bloom Energy fuel cells, citing faster permitting; Bloom also secures a $34M deal with LS Electric to power US data centers. (The Korea Times)

• Blue Energy and GE Vernova Hitachi advance a 2.5 GW gas-plus-nuclear plant in Texas designed to supply up to 1.5 GW to co-located data centers. (Data Center Dynamics)

Compute

• Groq raises $350M Series A at a $3.5B valuation, pivoting from chip ambitions to Nvidia-powered AI cloud infrastructure targeting 200+ MW of compute capacity. (Bloomberg.com)

• Crusoe is in early IPO talks, according to Axios, as the data center developer seeks to capitalize on surging AI infrastructure demand. (Axios)

• UCloud brings Hygon Tianxi AI accelerators to its public cloud platform, expanding domestic Chinese AI compute options. (TechNode)

Optics & Networking

• Fabrinet reported record Q4 and full-year fiscal 2026 revenue, with annual sales rising 36% year-over-year. (Fabrinet)

• Huawei open-sources the AscendNPU IR at the core of its BiSheng compiler, adding Triton and multi-language support for the Ascend 950. (Pandaily)

• Ulvac shares plunge their most in over seven years after the chip vacuum-pump supplier issues an annual outlook that misses analyst expectations. (Bloomberg Tech)

Edge

• Kulicke and Soffa appoints Dr. Raj Talluri as President and CEO, bringing a semiconductor product leadership background to the advanced bonding equipment maker. (Kulicke and Soffa)

• Google confirms MediaTek will supply the modem for Pixel 11, calling the new chip faster and more power-efficient than its predecessor. (9to5Google)

• L&T data center unit will host Nvidia hardware for Together AI, marking an early hyperscale-grade AI cloud deployment in India. (Data Center Dynamics)

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Things we cover:

• Logarithmic math vs. traditional matrix multiplication

• Juniper’s router fabric for AI scale-up

• Balancing compute, memory, and networking

• Combining pre-fill and decode on a single system

• Tensordyne’s 30kW, 72-chip quarter-rack system

• The role of partnerships with Broadcom and HPE Juniper

This podcast is lightly edited for clarity.

Introduction & Juniper’s Origin Story

Hey everyone, and welcome back to another Semi Doped podcast. Today we’ve got a special guest, R K Anand, co-founder and chief product officer at Tensordyne. If you haven’t heard of Tensordyne, it’s building an inference chip, an inference rack that does its math in a completely different number system and has other interesting architectural tricks that we’ll talk about. RK, I’m pleased to have you here to talk more about Tensordyne.

RK: Austin, it’s a pleasure to meet you and I’m very glad to be here. I watch a lot of your podcasts and I’m a big fan, so I’m glad to be here today.

Oh, right on. Awesome. Awesome. I love that. Thank you. Okay, so let’s start with you. You have a fascinating background in networking, which is really interesting because I think now that we’re at rack scale, obviously networking is a big part of the AI inference story. So, maybe tell our listeners more about you. Take us way back. You were at Sun, you were a founding engineer at Juniper. Kind of tell us about your career arc that led you all the way here.

RK: Yeah, so, this is my 37th year in Silicon Valley. I started my career at Sun in 1990, actually, designing microprocessors. So I was part of a microprocessor team. And Sun was building high-end servers for the market. So it was a really fascinating time. There’s a lot of competition, there was risk versus risk, and you got exposed to building really large multiprocessing systems.

Fast forward a few years to 1996, I was fortunate to join Juniper Networks as one of the founding engineers and led the first Silicon efforts there. And the reason I was able to do that was because Pradeep Sindhu, who’s the founder of Juniper, was one of my early mentors at Sun, was part of a team from Xerox Palo Alto Research Center helping us build these big machines.

And he gave me the opportunity to join Juniper. And I spent almost 17 years there with a little bit of a break. And saw the company from zero to like over $4 and a quarter billion dollars of revenue and the most fascinating part was that we were in the early days of the internet. The internet was doubling every six to nine months and I think Juniper transformed networking pretty significantly.

So it was a very good learning opportunity to start from scratch, grow with the company and eventually be very successful in building the biggest routers in the world. But most importantly, I think building great relationships and great friendships and being able to mentor a lot of the talent there. So I think it was a great learning experience for me.

Oh man, it sounds like it. Okay, so interesting. So you got to work on compute back at Sun and then you got to work on networking for a long time at Juniper and then here we are in this era, which is both compute and networking. So it seems like you have learned all the right things that you need for this era.

RK: Yeah, it’s fascinating, you know, I think the Silicon Valley, if you’ve been here long enough, go through cycles, right? And we’re in one more of those really great innovation cycles. And yeah, you’re right. You know, computing, you think about computing and you say, okay, general purpose computing or high-end client server computing and how was that built? Because we started from PCs, you know, mainframes, then PCs, then they went to client server.

And Sun was a premier company, a great innovation, a great place for innovating and and building great technology. And then Juniper ends up being the premier company in networking, building high-end core and edge routers, right? The fact that we have the internet today that works so flawlessly is because of all the work that companies like Juniper, Cisco and others did. And then we come to the world of AI and it’s again, back to computing, but then we start hearing for the last couple, three years, like networking is so central to AI.

So it’s a coming together of all of these things and, you know, you can then reflect back and see if you can take those learnings and apply them to what you’re doing today, I would say.

So, what I think is interesting and, you know, correct me anywhere I’m wrong, but when you guys started at Juniper, I assume that it was Cisco was probably the dominant player in the space.

RK: They were. Cisco was started in the early 80s and by or probably mid 80s, I don’t know the exact time, but when Juniper started in 1996, the browser had just appeared, right? Out of Urbana Champagne and Netscape, the Mosaic browser and Netscape had appeared and we were trying to put a lot of our data on the internet.

And we were trying to start sharing our, think of it almost like sharing your hard drives, basically. And there were these internet service providers, like UUNET was an example of them and they were using Cisco routers and Cisco was the dominant player. I think Cisco had like 93, 94% of the core router market share.

And fortunately for us, Pradeep, who was the founder of Juniper, looked at the way routers were getting built and he was trying to wonder why are they not getting built like high-end servers? So he had a general thesis that you could actually build routers far more efficiently. And then we got to hear from people like Mike Odell, who was CTO at UUNET, that the internet was doubling every six to nine months and he was unable to keep up.

And so Juniper fundamentally re-architected how routers were built and that completely transformed how the growth of the internet happened. Cisco by the year, sometime 2000, was the number one market cap company in the world. You know, they were like and John Chambers was on the cover of every magazine in the world.

And Juniper appeared in the landscape and we built the highest performing router and then I think within the span of a couple of years, we had 30% market share. So there is proof positive that when new markets evolve, there are opportunities for startups to come in and if they have technology that’s differentiated, they can have an impact in the market.

Nice, awesome. Yes, you you took it exactly where I was thinking in my head, which is like, wow, this actually feels very similar to back then where there’s a new technological revolution happening that’s impacting the end users, which was the internet at the time and it’s LLMs today. And there’s an incumbent that of course, is the largest market cap company in the world, and is quite dominant.

And I’m sure when you guys started Juniper, there was probably a lot of people that just said like, what are you doing? How could you ever possibly compete with Cisco? But then what I heard you say was the interesting insight is like, well, if you think that there’s a different way to tackle the technology that ultimately you do think you can compete on technical performance and then probably TCO and other things.

RK: Yeah, and you know, of course, the parallels only quickly end there because the size and scale of the market is kind of way, way different now. And the competitive landscape, you know, I mean, in those days of the internet, information was more constrained. We live in a different world today. Information is instantaneous. Everybody knows everybody else.

In that period between say 96 and 99, there were many other companies that were funded to build routers. I mean, all those names are etched in my mind, right? There’s Avici, there’s Fluris, and Nexabit, and there’s a bunch of companies. So, there’s an opportunity, the landscape opens up, an opportunity opens up. I think if you look at today, the scale is orders of magnitude larger.

The market capitalization of some of these companies is quite significant and then the technology power that is there, especially with Google or a lot of the hyperscalers also building Silicon and systems is that there’s a lot more information. But I think there’s a, you know, just like anything else, there are waves and there are changes that happen.

I think that if you look at the last five, six years, the initial phase was all training, AI training, right? And then we slightly shifted from training to inference and inference was initially we were doing monolithic kind of models and now we’re in the world of two trillion plus MOEs. So the architectural demands for inference are different from training.

And then for monolithic models to MOEs with, you know, two plus trillion models or 2.8 like Kimi K3, the pressures on the system are different. So there’s a window of opportunity that opens up on if you think about it and how can you build a system that addresses demand for today’s market that looks different from something that’s four or five years back.

The Log Math Advantage

Yes, perfect. Okay, so lead us into from there then into Tensordyne and what we have this window here. It’s it’s inference at just kind of massive scale. It’s mixture of experts, two trillion parameters. We want high interactivity these days. It’s agentic AI, right? So agents want to run at thousands of tokens per second ideally. And so therefore, so we’ve got this gap, we’ve got this window.

There is definitely a way that everyone’s doing it now, which is mostly like running this inference on racks and racks of GPUs. And Tensordyne is taking a different approach. So like tell our listeners, what is the technical differentiation that you guys are pursuing that you think is a different bet?

RK: If one were to break down the problem, the models are immensely large. They don’t fit on single devices anymore. So now you have to...

So there’s a networking problem that’s in front of you that makes it apparent that the model ain’t fitting on a single device, you got to spread it across many devices. Then there are power and other constraints that are in front of us, right? We can’t get power quickly enough, these data centers are large. And we didn’t start at this point, right?

If you look at, if you were to rewind a little bit, Tensordyne was prior to this was named Recogni and we had our series A funding in 2019 and we were more at that time, the world was about image and image recognition and Resnets and Resnet 54, Resnet 101. And we started as an inference company.

So, but because it was image recognition, we had to think, okay, how are we going to build a piece of silicon and a system that can do really exceptional performance, deliver high performance for AI for inference for image recognition and the market was automotive that we focused on. Automotive has a power constraint. The car can only give you so much energy.

So there’s a power constraint and you have to deliver inference and you have to process, let’s say incoming frames of from cameras that are at eight megapixels. So we set that up as a problem statement. And then the realization was that if you took traditional math and tried to do it in the car, you would blow the power budget of a car.

You know, rather than using it to move the car more miles, you would basically, you know, shrink the range of the vehicle. So our approach to inference at that time was like, let’s think about mathematically it being different. And let’s approach math it from a first principles math perspective. And that’s how we converge on using logarithmic math for AI.

So that set up, if one has to be fortuitous, well, that set up the foundation for Tensordyne today. We didn’t build a perfect device, but we validated our math. We validated that it really worked for AI. And the analogies were that, you know, first of all, log math’s been around since John Napier invented it over 400 years back.

So it’s not something that we dreamt of. And log math has been used, you know, if you think about like the Apollo program and all these programs, people used to use slide rules and log math to determine escape velocity and re-entry and all these things. And then over the last two, three decades, we’ve been using log math in DSPs.

So it’s not like we were the inventors of log math, but our realization was that can we use log math in AI? And so that, that helped us, right? And set us up for today.

Gotcha. Okay, okay, interesting. So for listeners who haven’t heard of Tensordyne before, Tensordyne actually started as a different company. What did you say the name was?

RK: Recogni, R E C O G N I.

Recogni. Okay. So probably image recognition, maybe it came from that.

RK: Exactly. Exactly.

Um, so you were looking at like convolutional neural networks, that kind of stuff pre-LLM, pre-transformers and you’re asking, okay, how can we do this at the edge, thinking automotive, so you know, self-driving cars, that kind of thing. Makes a ton of sense. And you obviously a power constraint there, which I’m sure we’ll get to.

It’s same power constraints in the data center, same but different, but like thinking about power. But you were taking a, you’re asking, how can we do this incredibly efficiently? And the idea was to use log math instead of the traditional like matrix, multiplication, multiplies and adds. Like tell our listeners a little bit more about like what does log math unlock as the benefit?

RK: So, you don’t, you can’t avoid matrix algebra. Matrix algebra is the fundamental for all of AI. So it’s not like we could avoid that. But if you take a number and convert it to a log number, then, and most of the operations are what are called mat mul, right? Which is basically, if you think about it, it’s a multiplication followed by an accumulate, an addition.

So we’re doing trillions of multiplications and additions in AI, whether we’re doing in convolutional neural networks for image recognition or in LLMs, it’s exactly the same. So when you take a number and make it a log number, then log base two A times B is log A plus log B. So multiply becomes an adder. And, you know, let’s think of ourselves as young children.

Let’s say we’re in elementary school and we’re trying to do multiply two numbers or add two numbers. Adding is easy, right? You just take the numbers and add them. But when you want to multiply, you know, you have to do long multiplication and add a bunch of after that. It’s the same thing in silicon. If you think about it, you have to have a lot more gates, you’re going to take a lot more area, a lot more power to multiply two numbers.

But you want to add two numbers, it’s more easy. Adders are, you know, like a building block in silicon. So, you solve the first part of the problem. The second part of the problem is really hard because now you have to take the result of the multiplication and add it. And the minute you are in a logarithmic domain, adding becomes a problem.

And if you were to take a traditional approach of a lookup table or Taylor series, all the gains that you have in going to addition in place of multiplication are lost. So our fundamental innovations that we’ve patented was to figure out how to go back from a log to linear space and perform the additions without losing the gains in area and space and power that we got from multiplying the numbers, actually adding them, right?

And so we’ve spent inordinate amounts of time in mathematics. So almost half the company spent almost half a decade in math, right? Because that’s what you, that’s how you can be a revolutionary startup rather than an evolutionary startup because then you can do, because if you do, if you do the same thing like everybody else has done and you have access to the same say silicon geometry, seven nanometer, five nanometer, you’re going to have no advantages.

You can’t compete against the biggest guys. So you actually have to think about this differently and that goes back to how, you know, in my thinking, reflecting back in 96 and 97, how Pradeep and and the other co-founders of Juniper thought about routers, right? And do it differently, forwarding in silicon versus forwarding with, you know, microprocessors.

So the similar analogies apply here and so we spend a lot of time thinking about that.

From Chip to System: The Networking Problem

Nice. Okay, awesome. So you reached for log math because you realized, okay, we have a bunch of mat mul to do and if we, and multiplication is expensive from a power and a die area perspective, and ultimately probably latency as well. And therefore if we can convert it to the logarithmic domain, we can turn these into adds, but then eventually it has to get turned back, converted back and you guys fought really hard about how to do that efficiently, effectively, cleverly.

And so, okay, so then you said, okay, we figured this out. This is great. This is more power efficient, small, fast. So then you took it to market ultimately or at least built chips for automotive to kind of prove out essentially the R&D side of things and to, okay, now connect me from there to getting into data center inference.

RK: All right, let’s do that. Let’s do that. So, think of a convolutional neural network as like a three by three matrix. So you have to perform nine operations, nine multiplies, followed by all the additions that make add up those nine numbers. So we had the building block for it. And we had functioning silicon in seven nanometer that was fully functional and we were able to demonstrate taking camera streams and doing that.

We hadn’t incorporated a lot of the safety features that we needed for automotive. And so at that time in, you know, late 22, early 23, chat GPT happened. And we realized quickly that our building blocks were really set up perfectly for this moment. The market was 50 or 100 times larger, the ability to have a product from power on to getting into revenue is much, much faster in the data center, in networking, rather than in automotive because automotive has a long qual cycle, right?

It takes a long time to build a car, you got to certify it, you got to make sure it’s safe. There’s a number of things that need to happen. So we coalesced as a team and said, let us look at our technology and see how applicable is it for LLMs. And LLM, you do one by one multiplications, not nine, three by three. Great. Well, LLMs, so if you look at Resnets and all, think of 100 million parameter systems.

And now you’re going for 100 million to multiple 100 billion to trillion parameters. So the memory hierarchy, the memory architecture has to change. You have to think of memory slightly differently.

But your fundamental building blocks for math, you can build upon. And so that’s what we did. And so we started architecting in 2023. So we had the good fortune of retrospective view on on math, and 100 million parameters. But we also had a view that what was the problem statement in front of us?

That is that you could go from multiple hundreds of billions to maybe trillions of parameters. And so how do we build an architect a chip for that? We still hadn’t solved the networking problem though. So we said, okay, let’s understand how to build first an accelerator that could be world class and deliver world class performance for LLMs.

And then the multi 100 billion parameter problem now became a multi-trillion parameter problem.

And so now you have to think of the networking problem next.

A Router Fabric for AI

Yes, yes. Okay, so you you guys said, oh, we’ve got all the building blocks, the opportunity is enormous. The path to production is shorter. I’m sure it was a hard decision, but in retrospect, it’s kind of a no-brainer. But of course, you had to make new memory hierarchy decisions.

And then to your point, that leads to the like, oh, that the model weights are not going to fit on one chip. Therefore, we have to connect lots of chips. Therefore, networking has to be like a first-class design priority.

RK: It does.

Yeah, so tell us more then about your networking and where you guys ended up.

RK: Yeah, so now, now, let’s for a moment step back and think about the first principles of how do you build GNA inference systems, right? So, there’s compute, there is constraints that are there place, right? What is your compute, whether you’re compute bound?

Whether you’re like memory bandwidth bound, how much bandwidth do you have coming in from external memory? Memory capacity bound, how much memory can you put, right? And then when you think about the networking problem, then you say, okay, how much bandwidth do I have facing in and out of a, let’s say scale up network?

And then what is my scale up network latency? Because that also might have an effect. So now you think about Silicon and you say, okay, how much of my real estate do I allocate for all of these things? How much do I allocate for compute? How much do I allocate for memory interfaces and memory capacity?

How much do I allocate for on-chip memory? There’s SRAM.

And then how much do I allocate in terms of interfaces and bandwidth and for my fabric interfaces? So when we sat back and looked at it, and this is like I think I believe in the summer of 2023, the realization from some me and some of my colleagues were, gosh darn it, we’ve been building these networking systems for 15, 20 years at Juniper Networks.

And I had the good fortune of leading some of the efforts at Juniper for in Silicon, for almost 17 years. And in the back side of a router, in the rear of a router, is a scale up fabric. Because if you think of a router, it’s got lots of front side ports.

So think of like a high-end router, it could have, I don’t know, almost hundreds of 800 gig ports. So traffic comes in from one port and then goes into the back, the rear of a router, and somehow that traffic has to be routed to an outbound port.

So a router typically is, you know, in a large point of presence, AT&T or Verizon or connects big data centers, Google or Amazon. So in the rear of a router is a scale up fabric. And it’s designed to deal with any-to-any traffic, any packet size.

So typically, you know, in if you look at TCP IP, you could have like a small 40 byte, 20 byte packet, you could have a jumbo frame, 9K, and the and the fabric has to deal with this random traffic. It might have like email, which is SMTP traffic, or it might have real-time video like this call.

So the router has to be robust under all conditions. And so the realization internally was like, there’s a ready-built scale up fabric available for us. If you can make the connection. And so we had the good fortune to be Juniper alum and HP Juniper now, HP Juniper alum.

And so we reached out and partnered with Juniper Networks and leveraged one of their highest end routers and took the scale of fabric in the rear of it and leveraged that for our system. So suddenly we went from having an accelerator that could be world class, highest performing, to an accelerator that is now well connected in a scale of fabric.

So this combination of networking and compute, if you had that, if you had the background, if you thought about it, then some of these dots can connect it and we were fortunate to do that.

Gotcha, fascinating. Okay, so you had the compute and then you needed, ultimately, you needed a scale-up fabric because you’re like, hey, we need to connect, let’s say, 72 chips together in a rack. And instead of having to start from scratch there, you’re able to partner with HPE Juniper, and come up with a scale-up fabric that that fits your needs there.

And okay, so talk to us more about the scale-up fabric because ultimately, I know that this could limit like the amount of tokens per second at the end of the day. So like, but but but take us there and explain it.

RK: Let’s think about the system broadly, right? So I I’ve always been, I mean, I think I’ve had good fortune to have mentors through my career that told me like, when you design systems, think about the balance. So if you if you over pivot on one resource, let’s say you’re compute, compute heavy, then you might be in points in time where the computer is sitting idle.

If you are, if you have undersized something, then, you might be starved of that resource. So you have to think about how you allocate this precious resource in a, in a Silicon. So, the thing that happened to us was that we wanted to build a scale-up fabric that was ready for yesterday, today, and tomorrow.

And the best scale-up fabric in the world was on the back side of a router. Why does why is that? Because it has to have some really exceptional any-to-any characteristics, so you can connect like multiple accelerators or multiple, think of routing devices, and you can connect them together.

It had to have incredibly low latency because we know that, you know, on a video call like this, latency has an effect on how we experience each other. We, you know, today we use FaceTime or whatever and we call people on the other side of the globe. Think of that latency, right? With multiple hops.

It had to be congestion-free, it had to be reliable, and it had to be, it had the capacity, the fabric or the the scale-up network had the should have the capability that you can push its utilization all the way up to 99 plus percent and it will still perform really well under those conditions, under loaded conditions.

So all of these were key elements for us. If you had to look at all of these elements, that was the the Juniper, HP Juniper Networks scale-up fabric in the back side of a router had those properties. So its latency characteristics are like sub one between one and two microseconds.

Okay, so now you look at this picture and then you say, wow, this is a this is the perfect fabric for us. What had happened in parallel in the world in networking, in sorry, in AI models? The models got larger and the traffic patterns went from rhythmic tensor parallelism kind of patterns to random traffic because when you do experts, the experts are random in nature.

So now communication at the if you for a high tokens per second per whatever, communication now becomes a bottleneck. And if your fabric is better than anybody else’s, that communication bottleneck is relieved some bit.

Sure, sure. Okay, this is so interesting. So, taking a step back, you guys said, hey, when you when you first start thinking about this, you needed to balance compute, memory, capacity, memory, bandwidth, networking, bandwidth, and on the scale-up bandwidth, you said essentially, yeah, what’s like the the best maybe maybe you’re able to look forward and think that this would be like the defining bottleneck of sorts.

What’s like the best possible scale-up networking technology that’s out there and you looked and you said, hey, at the back of these routers, that’s a really good one. So the experts are living in different places and for every token, it might need to go to a different expert. So irregular communication pattern. And now, contrast it for listeners with maybe like what’s being used today. Like when you say one microsecond, how should they benchmark that against like, you know, let’s say an NVLink or or AMD’s UALink or something.

Like, is it like an order of magnitude or how should we think about it?

RK: Yeah, so let’s reflect back the last couple of years. So the first scale up system for AI in the world is a GB200 NVLink NVL72. So it’s the first time because prior to that, only eight devices got connected together. So to connect 70 devices, it’s Gen 1. NVLink 72 is Gen 1. We are in Gen 7 of a scale of fabric when we leverage the, you know, HP Juniper Networks fabric.

That’s point number one. So there’s a learning cycle, right? Because when you build scale up systems, you have to build them, learn them, refine them, you know, there’s iterative process. That learning process we can leverage from HP Juniper. So that’s one part. Now, if you really look at the world of AI, most of the most of the vendors now said, okay, we need a scale of fabric.

So you saw consortiums come together with UALink, with Eson, still early days. They’re still in, you know, specs and then early implementation. We still don’t have accelerators that can talk UALink or and and UALink fabric chips and all of those things. So there’s a learning cycle that has to. We skipped those learning cycles with with Juniper because we know the architecture of that fabric.

A lot of our engineers were like core chief architects on some of that in the prior generation. So we know that. That’s one aspect of it. If you look at the Helios system from AMD, they they needed to get to this quickly, so they are now tunneling UALink kind of packets through a standard Ethernet kind of network. So now you think about, you know, typically when you move data over any link, you have to think about, okay, how much space is used by headers, addresses and all this other stuff, and then how much is payload?

Because what matters is how much payload and how long does it take to transmit the payload. So, all of these things are important elements in our choices. The other thing is as a startup, if you carry the burden of building silicon, but also carry the burden of building a system, then you have to qualify the system, the system has to have reliability characteristics.

There’s all these other things that now affect your time to market. So by partnering with HP Juniper Networks, we can leverage an existing shipping system that’s shipping today from Flexus factories in Penang. So we get to get to we get to take our our silicon integrated into and transform a router into a compute box and get to market faster with a reliable scale of fabric. So, I honestly believe, hand on heart, that NVLink is the first NVL72 is the first scale of fabric in the market.

We will be the second vendor in the market with a true scale of fabric, right? That has exceptional latency characteristics. Now, what is the latency? It’s between one to two microseconds. And this is by the way, I don’t know for a fact, but this is what I’ve heard anecdotally that typically the NVLink fabric has some latency characteristics that are not amenable to, for example, decode performance.

So maybe there there’s some refinement that needs to happen with NBL72 in future generations. So, net net, as a result of that, we end up with a system that’s really well balanced and can do pre-fill really well, but can do decode really well too. So you don’t have to have you know, these heterogeneous systems that have to appear to solve this high, what’s called interactive kind of AI needs of today.

One System for Pre-fill and Decode

Yes. Yes. Okay, great. Let’s go into that thread too. So, there was the era where it was just like use, you know, Hoppers for inference and then Grace Blackwills for inference. And then, some early AI ASIC startups who started, you know, well before LLMs, namely Groq and Cerebras, had SRAM heavy, designs that worked in the inference world for high interactivity, decode very fast.

Ultimately, of course, they had their own tradeoffs of, if you don’t have HBM, you have to chain together, you know, tons of these to get enough memory. And then recently in the last, you know, 12 months, basically, we’ve lived in this world where it’s like, okay, if you want really high interactivity, you can use an Nvidia system with Groq, and that lets you extend that Pareto curve to the very high interactivity, low throughput, but high interactivity.

And you know, we’ve seen AMD partner with Cerebras. AMD also bought Tallas recently, which is a different conversation. But so there’s we’re kind of in like phase two. Phase one was just run everything on GPU. Phase two is disaggregation, split pre-fill and decode, put pre-fill on the GPUs, put the decode on the SRAM heavy chips. And then you’re kind of hinting at like this next era beyond that where I, you know, I think Tensordyne is aiming and and so are some other AI ASIC startups.

Which would be actually, can you just use one chip to do both workloads, pre-fill and decode? And so so but tell us more about that because it feels a little counterintuitive because because, you know, as you said, you know, pre-fill maybe compute bound, decode is decode is memory bandwidth bound. So how does like one chip do do both?

RK: Really good question there, Austin. So, let let’s go back maybe 10 months back. So something happened towards the end of last year, right? GPD 4.5 got really good and then suddenly people started seeing, wow, the code is generating is functional. I don’t have to debug it a lot. And then comes, no, GPD, I think 5.3, I correct me wrong.

And in Opus 4.5, right? And so suddenly the demand for AI goes through the roof. And what are those models? My my gut says they’re over two trillion parameter models. So there’s a realization in the industry that those models cannot really work at a high in high interactive environments where the developers are saying, listen, I need code faster. I need everything faster.

And so the reaction to the industry is, well, we have great systems for training. They do pre-fill really well. And you know, kudos to the Groqs and Cerebras of the world that had already shown for smaller models like Lama 70 or GPT OS 120B, high tokens per second per user. So now comes the problem statement. Like I have a system that does really well in pre-fill, can be used for training, but now let’s talk about inference only.

Now I need to pair it with a a system that has a lot of SRAM and has low latency and I can do decode faster. So, I think that is an intermediate solution from these vendors, whether it’s Nvidia plus Groq or Amazon Tranium plus Cerebras or Helios plus Cerebras. Imagine, you know, nine racks or 14 racks to run a two trillion parameter model.

Imagine trying to build a compiler that compiles in CUDA for a for a Vera Rubin and not CUDA for a Groq system. And then imagine connecting them with lots of Ethernet switches because you have to hook up these chassis together. So, that is an answer to the demand of the market, right? Because the demand from everybody else is that we want to run these two plus trillion parameter models and now if you look at Kimi K3, it’s 2.8 trillion parameters.

But we need we need high token, you know, in the agentic world, you want high token rates, for example, tokens per second per user. Here the user could be human or could be an agent for all you care. All right, so now let’s get back to what did we do at Tensordyne. So, when I look at silicon real estate, there’s only so much space. Now, if my compute takes less space, what does it free up?

It frees up space for more SRAM and more HBM.

So you get the best of both worlds. You get what’s called, you know, you can do high throughput, but you can also do high tokens per second per user, with the same system. Why? Because ultimately, what you want to do is when you have compute, what matters is, you know, model flops utilization, MFU, for example. Well, if you have a lot of SRAM, adjacent to, let’s say, a compute array, you can keep that compute array really busy.

And you can hide the latency of getting data from HBM. So if you have a lot of SRAM, you are not penalizing yourself by stalling your compute array every time you’re going to fetch data or activations or weights from HBM. So we start getting the kind of unique properties of both of best of those both worlds. But that’s necessary, but not sufficient. Because now suddenly there’s communication now that now these models also have.

So, you know, you got to compute, then you got to communicate. Then you got to compute, then you got to communicate. And this rhythm of compute communicate or expert selection now, the communication starts becoming a dominant effect on latency or through throughput or tokens per second per user. So, our good fortune was to stick with log math, have the power characteristics, not blow the silicon, you know, you don’t have to build a chip that’s reticle size to achieve the performance that that’s in power with others.

And then suddenly you get the benefits of both of these. So now you have a great machine for pre-fill and decode.

The Tensordyne Rack: Power, Density, and Cooling

Ah, yeah, yeah, yeah. Okay, so the key insight is by using the logarithmic math that we talked about earlier, the compute doesn’t need to be reticle size, it can be smaller. So then the question is, what can you do with the rest of the silicon? And oh, we can have even more SRAM, for example. So you can have a lot of compute, a lot of flops, you can have a lot of SRAM, which is great for decode. But then you can still also have HBM for pre-fill and just having HBM in general, KV cache, that kind of thing.

And then you also feel confident in the competitiveness of your scale up network. So as you’re communicating between all these things, you feel competitive there too. So ultimately then, if I have a rack of Tensordyne, oh, which and by the way, we’ll touch on power too. But my first question is, if I have a rack of Tensordyne chips, is it, you know, 72 chips in your rack? And if so, like, do you still sort of split pre-fill and decode amongst them within the rack?

RK: So you have immense flexibility. So, first of all, we are building the Tensordyne system is only 13 rack units. So it’s a tiny, it’s 1/4 of a rack. We can put four of them in a rack. At 1/4 of a rack, think of our system, it has 72 chips in 1/4 of a rack. That’s point number one. Secondly, it consumes only 30 kilowatts. So if we were to compare do apples to apples, the comparable system is like a Blackwell GB300.

So 1/4 of a rack, one full rack, 30 kilowatts, 150 kilowatts. So, how do we do that? So, first of all, we leverage the Juniper air cooled system, so it’s not liquid cooled. Secondly, we have a scale up fabric that has the characteristics that are necessary for these multi-trillion parameter MOE models. Thirdly, our log math allows us to have silicon that consumes much lower power.

And so you get you get, you know, you get multiple benefits that are compounding in nature that now allows us at a, you know, to have performance at the, you know, GB300 Blackwell levels in a 1/4 of a rack. The second thing is that because we have the scale of fabric has this elegant properties, you can you can do you can put some chips on pre-fill, some chips on decode.

Or in a full rack, we can basically say, okay, there’s one of our pods is a pre-fill pod and three pods are decode pods. But ultimately, if you look at it, because of our characteristic nature of our any to any scale of fabric and the characteristic nature of keeping a keeping a very high MFU, because the SRAM keeps that, you know, I always refer to it as the compute dragon. Keep the dragon fed because the dragon’s hungry, you got to keep it, right?

You can’t you can’t let it off. So you keep the dragon fed. Now you get a system that is so much more balanced and can perform really well. And in some of our metrics, now we are yet to power on our system, but in some of our sense, we think that we could have advantages in the order of almost a magnitude over the latest greatest systems in the world.

Wow. Wow. Okay, I’m going to reflect this back. It feels almost too good to be true. So you can fit 72 in a quarter of a rack. That’s only 30 kilowatts. You can stack four of those in a rack, so 120 kilowatts, or so. And then it that whole rack is air cooled, right?

RK: Yes.

Yes, yes. So you could deploy it in brownfield data centers, existing data centers.

RK: Yeah, so imagine, you know, if you look at it, we have data centers around the world. You know, some of these hyperscalers are 400 data centers around the planet. They’re not liquid cooled. You can’t retrofit them, right? They’re in some of them are in bigger cities or in countries where you don’t have enough power. But you want to get AI around the globe. How are you going to do that? So, our system is because it’s a Telco rack, it’s 19 inch wide, it fits in AT&T, Verizon, Deutsche Telecom, NTT, New York Stock Exchange.

That rack is perfect for being used anywhere in the world. So suddenly you can get that benefit. The other is that you can imagine building smaller data centers, but having the performance characteristics of a large data center. So imagine, you know, with our system, you can actually get, you might need, you can get the, you can get like 1/8 the power, you can get, you can have a data center that’s similar to a very large data center, with the latest systems from our biggest competitors.

So now you can deploy them in smaller locations, smaller cities. You can put, you know, 20, 30 kilowatt kind of data centers, not needing a gigawatt data center, but having the performance characteristics of a 200 megawatt or 500 megawatt data center. So you get all of these benefits too good to be true, but, you know, if you build systems, you know, you have to know the system characteristics and system performance before you build it.

You don’t want to discover it in the lab. So, Yes. So we spend a lot of time at this simulating everything.

Go-to-Market: Partners and Timeline

Totally. Okay, very interesting. So, then my mind naturally goes to a couple questions. One, who are the target customers? Because on the one hand, I think of like enterprise, because it can fit into existing enterprise data centers and maybe instead of needing to buy, you know, nine racks or 13 or however many, you know, maybe they can buy one for their needs or or a few or whatever. And then two, yeah, timing. So, you know, I think you had mentioned that this isn’t totally taped out or stood up or productionized or something.

So, yeah, remind us like, so tell us, who are your your target customers? Because of course, I can also see, yeah, hyperscalers and the model labs and and and stuff being just as interested. And so maybe like target customers, route to market and timing.

RK: Yeah, so, our target customers are certainly number one hyperscalers. Number two, a lot of the neo clouds. We have a significant number of letters of intent from almost all the neo clouds in the world. Well, I want to clarify neo clouds in North America and Europe. And and then, maybe some sovereigns and some enterprises, right? So, but as a startup, you have to be laser focused, right? We don’t have a very large sales team.

So we had to focus on a targeted set of customers and we are doing that. The second question was timing, right? Yeah, yeah, yeah. So we’ve taped out our three nanometer chip with our awesome partner Broadcom. And so we expect devices back late October, early November. And we expect to power on our system and and then, you know, probably sometime in Q1 start doing beta with customers. We have some customers who have signed up for beta.

And then potentially go into production, early production sometime in end of Q2, early Q3 next year. So we’re not far away from there. Now, how can we do that? Because 80% of the system is already validated, qualified, certified in like 70 countries. We are we are building it out of the same factory in Penang, Malaysia. So we can actually quickly go from power on to qualification to certification to shipping of our system.

We have it worked out for the next, I would say, 10 months. But we’re fairly confident that we can get from here to there pretty rapidly.

Nice, nice. So is that because you’re riding the supply chain that Juniper was already riding or is this the advantage of partnering with Broadcom or both?

RK: It’s both. So, you know, Broadcom is one of the largest consumers of TSMC capacity, both TSMC and HBM capacity, right? They have a deep partnership and we have a exceptional relationship with the Broadcom team. They’re great friends and great supporters of us and so we designed, of course, our front-end design is ours, but the physical design and the partnership with TSMC is a Broadcom led. So that’s one part. So that means that from a supply chain perspective, as long as we forecast well in advance, we can get parts from Broadcom, right? That’s part number one. A qualified tested parts. The second part of the story is that can we get to volume with our systems? And this is where the partnership with HP Juniper Networks and the fact that things are shipping out of a Flex factory and Flex knows how to build these systems in volume, gives us those advantages.

The third most important part is that these systems have to be reliable because you’re running business critical AI now in them. So, Juniper’s routers and HP Juniper’s routers are carrier grade. There’s something called five nines of up time. So five nines of up time, if one were to Wikipedia it, is that the system cannot be down for more than 5. some odd minutes in a year or 680 milliseconds in a day.

So that is the reliability characteristic that we leverage from our partner. And so we are able to we will be able to deliver systems that are reliable and can run the largest models in the world, right? At 2.8 trillion parameter like a Kimi K3 or a Quen or from the frontier labs, their biggest models, right? Our systems will have adequate amount of memory, you know, if I if I look at the quarter rack system, we have we have 10.8 terabytes of HBM capacity. We have, you know, significant, I would say, over 18 gigabytes of SRAM.

Wow.

RK: So imagine we have SRAM capacity of the the big SRAM guys and we have DRAM capacity of also the largest thing. So now, whether it’s KV cache and agentic workflows, we we’re well set up for those system for those markets and those customers.

Mm, mm, fascinating. Amazing. A really nice way to punch above your weight, so to speak, as a startup by kind of by, you know, partnering with people who can help bring you along. When you mentioned Flex, by the way, is that Flextronics? Used to be.

RK: It’s Flextronics. Yeah, yeah. Okay. Yeah. And and you know, I mean, most of Silicon Valley thrives on partnerships, right? You can never go alone, right? Whether it’s silicon partners, system vendor partners, the ecosystem actually lends itself to that partnership. And we we, you know, we benefit from it, we mutually benefit from it, and we we we really love these partners because they are helping us get to that scale, will help us get to the scale, and they’re very supportive of us, right? They’re supportive of a startup. Not only that, HP Juniper Networks is an investor in the company.

So you think about it, they, you know, in in all of these things, you know, you can never go it alone. It’s like building a team, right? In the company, the team is multidisciplinary, but you can’t build a product by yourself. All these functions come together. It’s the same in the ecosystem of of vendors and partners who come together to build these solutions.

Yeah, sure, that makes sense.

RK: And and customers are the final, you know, arbiter of product, right? And we we customer validation is going to be super important for us over the next many months.

The Software Story

Yes, totally. Okay, so let’s let’s land the plane there, customers. So, you know, you mentioned really ramping up in 2027 with customers, beta, and then production. The one thing we hadn’t touched on yet was software. So, you know, for those model labs, those hyperscalers, what does it look like as far as how heavy of a lift is it to take, you know, your system and get their software, their frontier grade software up and running?

RK: Yeah, exceptional question, Austin. I think a few things have happened, right? One is that from the signals of these disaggregated stories, we understand that the moats of CUDA don’t exist anymore for inference because we have proof positive of a number of inference companies running solutions and then these disaggregated solutions with CUDA and non-CUDA or neuron and non-neuron or Rocm and non-Rocm, right? So we have this. So, I think there are a couple of things that have helped us.

One is obviously we have to build a robust compiler for our hardware, but also at the higher layers having technology that can take PyTorch or Triton kind of models and then convert them quickly and compile them quickly is super important, which we spend a significant amount of time. So for example, in our engineering organization, almost 60 to 70, 60 plus percent is software, right? Because you have to have a software team that does that. But one other thing has happened with this beauty of these new Opus 4.5 and and, you know, GPD 5.6 and other models is that the agentic workflows are now proving that you can take kernels and quickly get them ready for your hardware.

So we have incredible momentum on taking like the best models in the world and quickly getting them running on our, you know, in our simulators and then eventually in our hardware. So the the walls for taking new architectures and new systems are quickly crumbling when it comes to software because you can take models and because you have all these workflows and automated kernel generation capabilities that you can actually get to there, get to that and also get to high what’s called utilization of our systems quickly. That means that you can get first proof positive that the model works on the system and then you can iterate quickly to get the model performance up in the system.

So both those things seem to coincide with, you know, our systems coming on.

Yeah, yeah. Well, yeah, what fascinating timing with the rise of the agentic AI to kind of help you with that that last hurdle that people are a little concerned about, you know, am I going to have to spend a lot of time, not to your point, not only getting my code to run on this new system, but also optimizing it to get the most utilization out of it.

RK: Indeed, indeed. And that is super important because, you know, you don’t want an 800 horsepower car and get like 50 horsepower out of it, right? Because then you’re leaving stuff on the table, right? You’re paying for it, but you’re not using it. And we believe that we have we will have some of the best MFUs in the industry with our system.

Nice. Amazing. Okay. Well, we’re at time, folks. I hope you learned a lot about RK and Tensordyne and networking, a lot in logarithmic math. We covered a lot of ground here. RK, you’ll just have to come back and keep us updated, you know, as you guys get closer to delivering ships chips and systems and when your you have customers to talk about, you know, can’t wait to hear more.

RK: Austin, again, thank you for the opportunity. Thank you for, you know, the very thoughtful questions and, you know, and navigating all the different parts of the terrain on our behalf. And, you know, we’ll certainly keep you in the loop, keep you posted as we make progress, as we bring up our systems, as we get to beta. And would love to come back and tell you about our success and our progress. Again, like I I want to I can give credit to my broader Tensordyne family because we we won’t be here without the the complete dedication of a number of people.

And then most importantly, thank our partners, Broadcom, TSMC, HP Juniper Networks and Flex and others because we can’t be here without any without all of them helping us in this journey. So thank you, Austin. I really appreciate it.

Yeah, team effort. Very cool. All right. We’ll talk we’ll talk next time.

RK: We certainly will and my best to you, Austin. Thank you.

Thank you.

RK: Cheers.

SMIC beat Q2 earnings expectations and is eyeing capacity expansion as CEO Zhao Haijun says AI-driven demand is far exceeding previous forecasts. Nvidia guaranteed 4.25 of the 8 IT-GW at OpenAI’s Ohio campus and is investing $1.5 billion in SB Energy, and Anthropic is in early IPO roadshow meetings with backers floating a valuation above $2 trillion.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player

China’s Chip Makers Claim Pricing Power as Domestic Stack Matures

SMIC beat second-quarter earnings expectations and is now eyeing capacity expansion, with CEO Zhao Haijun telling analysts on Friday that AI-driven demand is “far exceeding” previous expectations and that the company may add equipment at existing sites. The foundry’s China revenue alone was up 22%, and it is signaling further wafer price hikes as AI peripheral chip orders swamp mature-node supply. Hua Hong is reading the same demand signal, with Morningstar raising fair value estimates on both Chinese foundries on the improved pricing outlook.

CXMT, the Chinese DRAM maker, crossed $500 billion in market capitalization to surpass Tencent and become China’s most valuable publicly traded company. The company rejected Apple’s request for DRAM price cuts, a notable reversal for a supplier that Apple was reportedly testing for iPhones and MacBooks amid an AI-driven memory shortage. YMTC, meanwhile, has overtaken Kioxia for third place in global NAND shipments. U.S. Commerce Secretary Howard Lutnick publicly opposed Apple sourcing memory from CXMT, adding a policy dimension to what had otherwise looked like a straightforward supplier negotiation.

Behind the demand surge:

• Hygon revenue rose 67% and Sugon profit 34% in the latest quarter as domestic AI computing infrastructure spending accelerated.

• CXMT DDR5 modules have now hit 9,000 MT/s speeds and CL28 timings at DDR5-6000, two performance milestones that narrow the gap with SK Hynix and Samsung.

• A U.S. federal judge dismissed a lawsuit claiming Micron had spread false statements to damage YMTC’s business.

Austin: CXMT is doing great, but you can’t quite compare them apples-to-apples with the Big 3 DRAM vendors. I explain why in last week’s Chipstrat article.

Vik: While memory may not be an investor favorite at the moment, remember that memory still underpins the amount of AI compute we can deploy. It’s not always HBM in the era of agentic AI and the importance of CPUs. Google is doing CXL too, and a lot of memory pooling there is not on cutting edge memory. Memory continues to be important.

Nvidia Guarantees 4.25 IT-GW at OpenAI’s Ohio Campus, Invests $1.5B in SB Energy

Nvidia has secured land, power and shell capacity at SB Energy’s PORTS-Pike Technology Campus in Pike County, Ohio, and the site will exclusively host Nvidia compute. Nvidia’s credit support covers an initial 4.25 IT-GW, with an option to take the remaining 3.75 IT-GW. OpenAI is the customer for all 8 IT-GW on a 20-year lease, and SB Energy will build, own and operate the data center. That puts a shape on last week’s reporting that Nvidia had cut its guarantee by more than 50%. Nvidia is backstopping 4.25 of 8 IT-GW now and holds an option on the other 3.75.

Nvidia is also investing $1.5 billion in SB Energy, joining SoftBank Group and OpenAI as investors. Reporting last week had put that at up to $3 billion. SB Energy and SoftBank will build at least 10 GW of new generation, which the companies say yields 8 IT-GW of AI factory capacity, a 2 GW gap between what is generated and what reaches the racks. They will also fund at least $4.2 billion of new regional grid infrastructure through a partnership with AEP Ohio the companies describe as designed to protect ratepayers. The campus reindustrializes the decommissioned Portsmouth Gaseous Diffusion Plant, spans private and federal land, and is being developed with AEP Ohio, the Department of Energy and the Department of Commerce. Capacity comes online in phases beginning in 2028.

Jensen Huang put land, power and shell at the center of the announcement, saying they “have become vital in the age of AI.” He described the arrangement as “securing long-lived infrastructure” for Nvidia compute so OpenAI can deploy AI factories “that can be upgraded repeatedly with each new generation.” The lease runs 20 years. Nvidia’s product cadence is annual.

In related news:

• Goldman Sachs and JP Morgan advised SB Energy on the deal, and Morgan Stanley advised Nvidia. Goldman had already landed a role and opened talks with investors to syndicate the $100 billion financing package.

• OpenAI matched SB Energy’s $40 million community benefits fund with an incremental $40 million, taking the anchor commitment to $80 million for affordable energy, workforce development and local economic development.

• Nvidia’s 13F filings have drawn fresh scrutiny as the guarantee changes surface; The Next Web notes the filing reveals details of Nvidia’s broader stakes in AI ventures.

Austin: Nvidia is ultimately backing the data center itself. Savvy. If OpenAI falters — no big deal, just turn and rent the datacenter and Nvidia chips to someone else. And Elon recently showed us how profitably and quickly one can lease out an existing big Nvidia cluster.

Vik: It is becoming increasingly hard to build out ultra large scale AI campuses due to power and land availability. Securing smaller sites and connecting them with scale-across will become important. As Jensen says, land and power will drive AI into the future.

Anthropic Courts IPO Investors With $2 Trillion Valuation Case

Anthropic has begun early IPO roadshow meetings with prospective investors, with backers floating a valuation above $2 trillion built on a Reuters-reported forecast of $190 to $200 billion in 2028 revenue. That number is doing a lot of heavy lifting. To make it feel less like arithmetic and more like a plan, the company is simultaneously assembling the operational infrastructure the projection requires, signing long-term compute contracts and shopping for inference speed.

Anthropic is in advanced talks to acquire Decart, an inference-acceleration startup, for roughly $6 billion, which would rank as its largest acquisition to date. On the compute side, the company has locked in a 20-year supply agreement with bitcoin miner Riot Platforms worth approximately $9 billion, an arrangement that converts Riot’s power assets into dedicated AI infrastructure. Projected Q2 revenue sits at $10.9 billion, a figure backers are presenting as evidence the 2028 target has a credible trajectory. No IPO date has been announced, but the early investor meetings confirm the process is no longer theoretical.

On an adjacent front:

• Riot Platforms shares have drawn fresh analyst attention as the Anthropic deal repositions the bitcoin miner as an AI infrastructure provider.

Austin: Anthropic and OpenAI IPOs will be great for the markets; it’ll give us the insight we need into the world’s fastest growing companies. These are ultimately the end buyers of all the AI infra… transparency into their businesses will be much appreciated.

NAND Supply Gap Widens as Phison, YMTC, and Kioxia Reshape Market

Phison CEO Khein-Seng Pua has warned that NAND supply won’t catch demand until 2030, a four-year shortfall that the controller maker says will keep SSD prices structurally elevated. The forecast lands as the market’s third-place ranking quietly reshuffled: YMTC has overtaken Kioxia in NAND shipments, pushing the Chinese manufacturer past its Japanese rival for the first time. Kioxia, for its part, is generating its own headlines through a buyback program that Bloomberg reports has propelled Japan’s corporate stock purchases to a record, with SK Hynix emerging as Kioxia’s largest shareholder as a result, though analysts note a full takeover faces significant barriers.

Phison’s warning, if accurate, means buyers have roughly four years of constrained supply ahead, with no near-term capacity wave large enough to close the gap. YMTC’s rise in shipments reflects how quickly Chinese producers are scaling despite ongoing export controls, adding a geopolitical wrinkle to an already tight supply picture. Kioxia and SanDisk offered a glimpse of where capacity is headed, demonstrating a chip that could enable the world’s first 1 PB SSD.

On an adjacent front:

• Kioxia also demonstrated a PCIe Gen 6 SSD hitting 10 million IOPS, a benchmark that frames where enterprise storage performance is heading.

• SK Hynix’s position as Kioxia’s biggest shareholder stops well short of operational control, given cross-shareholding structures among existing investors.

Vik: NAND is critical infrastructure in the age of AI, with early developments into HBF underway, and Kioxia developing high-IOPS XL-flash. The NAND performance tiers will fragment significantly between performance and storage tiers and everything in-between.

Sector Watch

Compute & Edge

• OpenAI launches an Ultrafast inference mode for GPT-5.6 Sol powered by Cerebras wafer-scale chips, delivering 14x speed improvement — a live commercial deployment outside Nvidia’s GPU stack. (Cerebras)

• Google is reportedly in talks with AMD to co-design its next-generation TPU, potentially integrating on-package CPU cores for reinforcement-learning workloads — a significant departure from Google’s in-house-only ASIC strategy. (Tom’s Hardware)

• Biren Technology projects up to a 22-fold revenue surge in first-half 2026, marking a breakout for China’s domestic AI accelerator ecosystem. (South China Morning Post)

Foundry & Packaging

• CK Solution wins a 30.8 billion won construction order for Samsung Electronics’ Pyeongtaek P5 fab expansion. (The Elec)

• TSMC Arizona doubles profit to NT$36.1 billion in H1 2026, underscoring the financial momentum of its US fab ramp. (scanx.trade)

• HCL-Foxconn semiconductor JV appoints Shikhar Malhotra as chairman to lead its India OSAT facility push. (Bisinfotech)

Data Centers & Power

• Core Scientific closes $444 million acquisition of Polaris Design Systems, targeting a 1.5 GW AI compute campus in Muskogee, Oklahoma — its largest power footprint to date. (Core Scientific)

• SK Innovation and TerraPower sign an agreement to explore deployment of TerraPower’s Natrium small modular reactor in South Korea, linking semiconductor-sector energy demand to next-generation nuclear. (The Elec)

• OpenAI is forced to delay its $20 billion Georgia data center plan amid power and permitting constraints. (E&E News by POLITICO)

Memory

• Jeju Semiconductor reports Q2 operating profit surging 2,745% year-on-year, signaling a sharp memory market recovery for specialty DRAM suppliers. (The Elec)

• Soulbrain posts 46 billion won Q2 operating profit and advances its Texas fab build-out to serve advanced memory customers. (The Elec)

• Intel signals a renewed push into memory, with reporting detailing a strategic crossroads as the company eyes re-entry into the segment.

Optics & Networking

• Quanta Computer and Quantinuum sign a collaborative development agreement to build industrial quantum computing infrastructure. (EE News Europe)

• Lynk and Omnispace complete their merger and rebrand as Elveo Mobile, targeting 320 LEO satellites for direct-to-device services. (Light Reading)

• Naver invests in US startup Panthalassa, which is developing wave-powered floating AI data center platforms. (The Elec)

Equipment & Materials

• Lam Research plans to invest more than $3 billion over five years to expand its global R&D laboratory network as semiconductor fab capacity scales. (EE News Europe)

• Gigatech signs a 2.3 billion won contract to supply nanoimprint lithography equipment to a global electronics company. (The Elec)

• Supermicro plans to build its first India server manufacturing plant in Chennai with an investment of approximately 477 crore rupees. (Dealroom)

Policy & Trade

• Ingenic Semiconductor launches a Hong Kong IPO targeting up to HK$3.22 billion, joining a wave of mainland Chinese chipmakers tapping Hong Kong capital markets. (SCMP)

• Guangdong province deepens its partnership with Alibaba to accelerate AI and semiconductor industry development across the region. (SCMP)

• Alibaba sells its gaming arm for $1.5 billion, redirecting capital toward its AI and semiconductor investment priorities. (Bloomberg.com)

Name X.

CLUES:

In 1991, this same company was looking to diversify beyond wireless chips into software, and email looked like a smart bet on where the internet was headed.

SPOILER ALERT: ANSWER BELOW

The flowers are snapdragons.

His name was Russell Ohl, and his forgotten story starts with a rock he should have thrown in the trash.

In early 1940 (some accounts place it in late 1939), Bell Labs researcher Russell Ohl picked up a chunk of silicon with a visible crack down the middle and connected it to an ohmmeter. It should have been junk because the semiconductor world of the day was obsessed with purity; any variation in a crystal was a flaw to engineer away, and this slab was riddled with them.

Ohl had spent over a decade at Bell Labs by then, and most of it fighting for permission to keep doing what he was doing. He joined the company in 1927 after a stint building radio receivers, and by the 1930s he had become obsessed with an idea most of his colleagues thought was a dead end: that silicon and germanium crystals, notoriously flaky and inconsistent, might make better high-frequency radio detectors than vacuum tubes, if only someone could grow them pure enough.

Management was skeptical, because vacuum tubes worked. Crystals were what people used before tubes, back when radio reception meant fiddling with a cat’s whisker wire until you found a lucky spot on a lump of galena.

Ohl kept experimenting anyway, purifying silicon in small furnaces, slicing the cooled ingots into wafers, and testing them one by one. But silicon was the unwanted child of mid-century electronics - stubborn, unpredictable, and seemingly impossible to wrangle.

Then came the cracked wafer. It was, by all accounts, an absolute disaster of a sample, riddled with variations and split by a visible fissure running down the middle. It should have gone straight into the bin. Instead, Ohl decided to do what engineers do when they find time, and decided to FAFO. He connected it to an ohmmeter and carried it over to a window. When sunlight hit the slab, the needle on his meter violently jumped. He moved it into shadow and it dropped back. He moved it into light again and it leaped because it was reacting to the light.

The cracked wafer turned out to be the lucky spot. When Ohl and his colleagues examined it, they realized the crack wasn’t damage to the crystal structure so much as a boundary inside it. As the molten silicon had cooled and solidified, trace impurities had settled unevenly, leaving one side of the ingot with a slight surplus of electrons and the other side with a slight deficit. The crack sat right at the line where the two sides met.

What Ohl had walked into, almost by accident, was the p-n junction, the structure modern electronics still runs on. It is why a diode only lets current flow one direction, the switching mechanism at the heart of a transistor, and what lets a solar cell convert sunlight into usable electricity. He had proven, against the purity-obsessed culture of his field, that the future of semiconductors lay not in eliminating impurities but in controlling them; what the industry now calls doping.

Bell Labs leadership filed the patent on the discovery in 1941, calling it a “light-sensitive electric device,” essentially inventing the silicon solar cell thirteen years before they built a more efficient and practical version from the same principle. They treated the find as a curiosity, useful perhaps for radio detectors or solar cells, not the opening of a new era. It took years more work, and the invention of the transistor, before anyone grasped what door had been kicked open. History is notoriously fickle that way.

When Walter Brattain, John Bardeen, and William Shockley built a working transistor in December 1947, they were standing on Ohl’s junction, whether or not history remembers it that way.

Word of the demonstration reached research director Mervin Kelly, and soon a small crowd of physicists had gathered in his office to watch a piece of rock light up. Walter Brattain, who would win a Nobel Prize seven years later for co-inventing the transistor, is said to have been floored by what he saw: the effect was far stronger than anything anyone had measured with a light-sensitive material before, so much so that he suspected a trick until Ohl handed him a piece to test in his own lab.

The ultimate irony of Ohl’s discovery is that he succeeded by ignoring the dogma of his era. While everyone else was killing themselves to remove impurities, Ohl found the secret to the future in the dirt, proving that semiconductors are not about absolute purity, but about the controlled introduction of atomic flaws.

Ohl retired from Bell Labs in 1958 at 60, moved to California, and spent his later years publishing papers on semiconductor crystals and, by some accounts, studying how plants respond to noise. He died in 1987, holder of some 130+ patents and essentially unknown outside the small world of transistor historians. The men who built their Nobel-winning breakthroughs on top of his cracked silicon, went to Stockholm. Ohl got a broken rock that changed the universe, and barely a footnote to show for it.

Sometimes, the future is found in the beautiful, conductive brokenness of things. It’s why we named this newsletter after the very thing Ohl accidentally discovered: doping.

Applied Materials posted record quarterly revenue of $9.12 billion, up 25 percent year over year, with non-GAAP EPS climbing 41 percent to $3.50. SanDisk projected mid-to-high-teens revenue growth from FY2028 through FY2030, SMIC crossed $3 billion in quarterly revenue for the first time, and Anthropic is reportedly in talks to acquire Nvidia-backed Decart AI for $6 billion.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

Applied Materials Posts Record Quarter as Equipment Cycle Broadens

Applied Materials reported record revenue of $9.12 billion for its third quarter of 2026, up 25 percent year over year, with non-GAAP EPS climbing 41 percent to $3.50. The company’s EPIC Center R&D partnerships expanded to 11 engagements, even as shares slipped after the guidance cleared a bar that the market had already priced in. Reuters noted that the forecast came in above analyst estimates but investors sold the news, a familiar dynamic when expectations run ahead of results.

Lam Research added ballast to the cycle by committing to invest more than $3 billion to expand its global lab network, framing the move explicitly around AI-era innovation velocity. Korean supplier ISTE provided a ground-level read on the same trend: the company posted record quarterly revenue of approximately 16.85 billion won, a 401 percent jump from a year earlier, with operating profit turning positive at 2.07 billion won.

Vik: WFE equipment vendors have visibility into 8-quarter rolling window as customers providers provide roadmaps out to 2030. This is unusual for this industry, which usually looks ahead only 2-3 quarters. The demand for semiconductors remain strong.

A note on ISTE and what they do: they provide cleaning materials for front opening unified pods (FOUPs), specifically for HBM. These FOUPs are extremely clean “boxes” that transport wafers between machines in a fab on ceiling mounted rails. And they do need internal cleaning. I find it interesting how far down the AI supply chain goes.

Austin: The 8-quarter window exists so everyone downstream has time to add capacity. Applied’s CFO Brice Hill said the company is “systematically translating our 8-quarter customer demand forecast into a consolidated signal to our suppliers,” and that Applied has on the order of 2,000 direct suppliers!!! No wonder they need two years.

Asked whether the visibility is shifting order patterns, prepayments or pricing, Hill said deposits exist but “not across the board”, pricing runs as 2 to 3 year project contracts that move “relatively slowly”, and there’s “no change in the overall model.”

This is in contrast to substrates. Ibiden’s ¥500 billion expansion is customer-funded, its stated policy being to “receive an amount equivalent to the investment as an advance payment”.

So when Intel says it’s “actively securing supply of substrates and memory”, securing can mean funding the plant, not just placing an order. Not the same when Intel says it’s “aggressively locking in tool purchase orders”. It might seem like substrate makers have more power than tool vendors if they can ask customers to prepay, but I think it’s the opposite; putting more financial risk on the customers like this isn’t great and comes at a cost, I’d rather be AMAT and not need to do this to my customers.

SanDisk Investor Day Bets on NAND Boom Through Decade’s End

At its 2026 Investor Day, SanDisk laid out a financial model projecting mid-to-high-teens revenue growth from FY2028 through FY2030, anchored by what the company described as a leading NAND technology roadmap and durable customer partnerships. The plan goes further than growth targets alone: SanDisk committed to returning 100 percent of excess cash to shareholders after capital investment, a pledge that landed well with investors already watching memory prices climb. Asian memory chipmakers rose on the back of the SanDisk presentation, with Bloomberg reporting the outlook lifted broader confidence across the sector.

See the full investor day 98-slide presentation here.

Vik: Their BiCS 10 platform is the newest and is 332-layer 2Tb QLC NAND. What is really interesting is their HBF roadmap. I recommend you go look at like slide 83 onwards. There is some really interesting stuff there like this chart of potential use cases.

Chinese Foundries and CXMT Post Records as Domestic Chip Stack Takes Shape

SMIC, China’s largest contract chipmaker, posted its first-ever quarterly revenue above $3 billion in Q2 2026, with net profit jumping 261.7 percent year on year to $479.2 million on surging orders for mature-node chips used alongside AI processors. Demand ran so far ahead of forecasts that management is now actively evaluating additional equipment installations across its fabs, and the company has begun raising wafer prices as capacity tightens. Smaller rival Hua Hong Grace saw first-half net profit surge 404 percent to $59.5 million; Digitimes attributed the swing largely to pricing power, noting its fabs were already running full before rates moved.

CXMT, the domestic DRAM maker, overtook Tencent to become China’s most valuable listed company just 17 days after its IPO, reaching a market cap of $524 billion. Korean media reported that CXMT’s latest DRAM yield rate trails Samsung’s by only two percentage points, a claim that, if accurate, narrows the technology gap considerably.

Behind the demand:

• China’s AI chip market is approaching 90 percent domestic share in 2026, with Huawei on course to displace Nvidia as the leading supplier, according to Digitimes.

• CXMT’s market capitalization now rivals Intel’s, according to Business Insider.

Austin: A sign of the times! It’s like the mid 2020s (AI + semis) overtaking the mid 2010s (social and gaming). I’m here for it.

Vik: The rise of CXMT is incredible, and we continue to track it here on Semi Doped Daily!

Anthropic Pursues Decart Acquisition

Anthropic is in talks to acquire Nvidia-backed Decart AI for $6 billion, according to Bloomberg, a deal that would add inference-focused model capability to the company’s portfolio as it prepares for a public listing. Decart, whose backers include Nvidia, has drawn Anthropic’s interest partly because of its work on fast, efficient inference infrastructure. The acquisition talks arrive as Anthropic separately targets 77% gross margins before its IPO, a threshold that would make the financial story considerably cleaner for prospective public investors. The company has set its sights on what would be a $2 trillion IPO valuation, which would set a record if achieved.

Vik: We noted on May 19th, 2026 that Decart is incredibly cool, and that you should probably be using it to impersonate your boss’s boss. Glad Anthropic sees the value in this startup!

Austin: I wrote about a neat Decart and Etched collab back in November 2024. Here we are two years later and folks are taking these companies seriously. I was early 🫡

Sector Watch

Memory

• SK Hynix sets August 27 groundbreaking for its advanced packaging facility in Indiana, with SK Group Chairman and Nvidia’s Jensen Huang expected to attend. (The Elec)

• Kioxia eyes customer trials for a PCIe Gen6 optical SSD, targeting storage interface bandwidth beyond current electrical-interconnect limits. (digitimes)

Foundry & Packaging

• Samsung Electro-Mechanics delays semiconductor glass substrate mass production to beyond 2028, a slip that pushes back a key next-generation packaging enabling technology. (digitimes)

• Rapidus targets 8-reticle interposers by 2030, expanding its advanced packaging ambitions beyond 2nm logic as Japan’s national chip strategy widens in scope. (digitimes)

• TSMC expands advanced packaging outsourcing, boosting orders for Korean post-processing equipment makers as CoWoS demand accelerates. (아시아경제)

Compute

• AMD raises as much as $5 billion from a debt offering to fund its accelerating AI accelerator and data center chip push. (Bloomberg.com)

• Blaize reported Q2 2026 financial results for the quarter ended June 30, 2026. (Blaize)

• Cerebras raises its 2026 full-year outlook even as hardware sales soften, shifting revenue mix toward inference services. (digitimes)

Data Centers

• Nebius leases capacity from Vantage in Newport, Wales and announces a second Finland site, broadening its European GPU cloud footprint. (Data Center Dynamics)

• Vantage Data Centers explores an IPO at a $100 billion valuation or an outright sale, per Reuters reporting. (Reuters)

• L&T secures a mega order to deploy 10,000 Nvidia B300 GPUs for Together AI in Chennai, India’s largest single-cluster AI factory. (The Times of India)

Optics & Networking

• Sivers Semiconductors and SemiNex launch a $3.4 million program to develop InP light sources targeting AI data center interconnects. (EE News Europe)

• ZJ InnoLight subsidiary acquires a stake in PCB giant Avary Holding, vertically integrating the optical transceiver supply chain toward substrate-level components. (TrendForce)

• Google, Microsoft, and Nvidia back an 800V DC power standard for AI data centers, targeting rack-level efficiency at scale. (Network World)

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CoreWeave’s revenue backlog hit $104 billion before pulling in another $25 billion in new commitments, cementing the AI infrastructure buildout as very much still in motion. YMTC grabbed third place in global NAND shipments at 14% in Q2, Cisco is projecting $7.5 billion in AI data-center-tied sales. Not a quiet day.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

CoreWeave and Nebius Earnings Underline AI Infrastructure Supercycle

CoreWeave and Nebius earnings this week point to continued strength in AI infrastructure spending. CoreWeave’s revenue backlog hit $104 billion, with another $25 billion in new commitments added on top. Shares rose roughly 18 percent after the company raised prices 25 percent while near-term capacity stays sold out. The company is also signing A100 contracts running to 2029, keeping six-year-old GPUs in revenue-generating use. On the other side of the ledger, debt has reached $35.6 billion, and the company separately warned that shifting away from Nvidia chips would take significant time and capital.

Nebius reported 514 percent revenue growth year-over-year, with deferred revenue near $6 billion and first-half infrastructure spending above $8.1 billion. Shares rose 34 percent on the results. Super Micro beat on margins and AI-server demand, which Barron’s framed as a recovery in investor confidence after a difficult stretch. The Information reported that both Nebius and CoreWeave are benefiting from rising AI compute prices, with pricing power holding even as capacity grows.

Vik: Those A100’s are still alive and kicking! There was so much debate about GPU depreciation and lifetimes some time ago. If those early NVIDIA chips have contracts running to 2029, imagine how long Blackwells will continue to be useful into the future.

YMTC Grabs Third Place in NAND as Chinese Memory Makers Push Broad Advance

YMTC captured 14% of global NAND shipments in Q2, according to Counterpoint Research, overtaking Kioxia, Micron, and SanDisk to break into the top three for the first time. Samsung and SK Hynix held the first and second positions, per reporting from Chosunbiz. The surge came as AI servers consumed 48% of all flash shipments in the quarter, a demand wave that lifted enterprise SSD volumes and gave YMTC room to climb. Bloomberg reported that YMTC edged out Japan’s Kioxia specifically on shipments in the June quarter, a result the outlet tied to AI-driven supply tightness in the broader market.

CXMT is pressing a parallel attack on DRAM. Chosunbiz reports CXMT is also expanding into mobile DRAM, intensifying its pursuit of Samsung and SK Hynix across another product tier. Two fronts at once is an uncomfortable position for the incumbents.

On a related front:

• A venture fund backed by YMTC has taken a stake in SOI Micro, a domestic developer of FD-SOI chipmaking technology, as China builds alternative fabrication ecosystems.

• Notebookcheck flagged that YMTC’s top-three ranking carries a caveat: the company remains cut off from the U.S. market under export controls, so its share gains are concentrated in China and select non-Western buyers.

Vik: Breaking up market like this with bits shipped is one thing, but the kind of NAND flash also matters. Kioxia XL-Flash is high IOPS and is well suited for AI applications. Higher performance flash commands a higher ASP, and the revenue balance will change because of that, among these companies.

Cisco and Lenovo Earnings Show AI Spending Reaching Enterprise Hardware

Cisco’s fourth-quarter revenue of $17.3 billion and a full-year forecast projecting $7.5 billion in AI data-center-tied sales together confirmed that enterprise networking demand has moved well past its post-pandemic slump. The $7.5 billion figure drew a cool reception from some investors: Bloomberg reported that Cisco had already accumulated $9.3 billion in AI-related orders over the past year, making the annual target look modest against the backlog. Cisco itself described the demand environment as “broad-based”, and Reuters noted the forecast came in above analyst estimates.

Lenovo, for its part, posted a 43% jump in quarterly revenue, the highest growth rate in five years and the strongest absolute quarter in the company’s history. The surge, driven by what Lenovo calls a hybrid AI strategy, spans both its infrastructure server business and its traditional PC and device lines. Two large, structurally different technology companies reporting simultaneously strong results from AI-related demand, one in networking silicon and one in end-user and server hardware, is the kind of coincidence that stops being a coincidence.

Behind the demand:

• Cisco’s Q4 also produced GAAP net income of $3.9 billion, or $0.97 per share, with non-GAAP net income reaching $4.9 billion.

• Lenovo flagged the quarter as the strongest in the Group’s history across multiple financial dimensions, not just revenue growth rate.

Cerebras and Cisco Stocks Drop >10% after Failing to Meet Expectations

Cerebras Systems slid roughly 17% in late trading after its results disappointed investors expecting bolder growth from the novel wafer-scale chip designer. The hardware business actually contracted quarter-over-quarter, what Bloomberg characterized as a sign of “lumpy” demand rather than the smooth upward curve the AI trade had priced in. Cerebras did raise its annual targets, citing strong AI chip demand broadly, but the revised guidance still fell short of buy-side expectations for a company competing at the frontier of accelerated computing.

Cisco compounded the unease by projecting $7.5 billion in AI data center sales this fiscal year, a figure that landed poorly given the company had accumulated $9.3 billion in AI-related orders over the past twelve months. Investors had expected that order backlog to translate into a more aggressive revenue forecast. Cisco separately beat its overall sales outlook, citing broad-based record demand, but the AI-specific shortfall pulled focus. Two companies, two different product lines, one shared problem: order momentum and reported revenue aren’t moving in lockstep, and investors are starting to notice the gap.

Sector Watch

Compute

• AMD Instinct MI455X deep dive reveals CDNA 5 architecture as backbone of next-generation AI server accelerator lineup. (ServeTheHome)

• Nvidia serves Alibaba’s 2.4-trillion-parameter Qwen3.8 model on GB300 NVL72 with Day-0 inference results published. (EE News Europe)

• Aehr Test Systems receives a $22 million follow-on production order for wafer-level burn-in systems targeting AI processor customers. (Aehr Test Systems)

Foundry & Packaging

• TSMC board approves an additional $29.44 billion in capital spending for advanced processes and packaging as AI demand accelerates. (bloomingbit)

• Foxconn reports AI servers now exceed 50% of revenue, with CEO flagging CoWoS packaging as the binding constraint on 2027 AI server supply. (WSJ)

• Photronics will report fiscal Q3 2026 earnings on August 26 before market open. (Photronics)

Memory

• Rambus announces HBM4E memory controller IP reaching up to 16 Gbps per pin, targeting next-generation AI accelerator bandwidth. (TechPowerUp)

• Meta cuts server count 25% by deploying CXL-based memory expansion reusing decommissioned DDR4 modules across millions of servers.

• FADU secures 10 billion won in short-term financing to support surging enterprise SSD customer demand. (The Elec)

Optics & Networking

• Fujikura raises its full-year outlook as AI-driven fiber demand continues to build across data center interconnect markets. (Fujikura)

• Prysmian commits $1.25 billion to double its US fiber manufacturing footprint to meet surging connectivity demand. (Fierce Network)

• Tenstorrent posts GCC compiler patches for its Ascalon XG core, advancing open software support for its RISC-V AI processor platform. (Phoronix)

Policy & Trade

• US launches initiative to accelerate trade in AI goods between allied nations, targeting supply chain alignment and export coordination. (Bloomberg)

• Anthropic investors price the company at a $2 trillion valuation ahead of what would be a record IPO, per Financial Times reporting. (Financial Times)

• Tencent reports Q2 revenue beating estimates while CapEx jumps 176% on AI infrastructure push, with shares under pressure on cost-escalation concerns (SCMP)

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TSMC’s CoWoS yield has reportedly crossed 99%, though ABF substrate and memory shortages mean AI chip bottlenecks aren’t going away yet. CXMT hit 90% yield on DDR5, which is putting real pressure on Apple’s memory sourcing decisions. Foxconn posted a 35% quarterly profit jump on AI server demand, and US power consumption is on track for record highs in both 2026 and 2027 as data center buildouts collide with local grid politics.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

TSMC CoWoS Yield Clears 99% but ABF and Memory Keep AI Chips Waiting

TSMC’s 5.5-reticle CoWoS yield has reportedly crossed 99%, removing what had been one of the sharpest constraints on advanced AI packaging capacity. The foundry isn’t resting there: it has cut its 3DIC development cycle to one year while actively working to contain CoWoS material risks. Yet TSMC itself has flagged ABF substrates and memory as the next bottlenecks in the AI chip supply chain, a candid admission that solving one layer of the stack just exposes the one beneath it.

Nvidia currently controls roughly 60% of TSMC’s packaging queue, while Microsoft’s Maia 300 program is seeking 300,000 units from the foundry. That concentration makes the ABF and memory constraints acutely felt across the industry. To expand its packaging footprint, TSMC is reportedly pursuing two AUO fabs valued at over TWD 30 billion to add FOPLP and CoPoS capacity, with one Longtan site potentially supporting 1.4nm production as well. The acquisitions, if completed, would broaden TSMC’s options beyond CoWoS, though the ABF and memory supply gaps sit upstream of any packaging format TSMC might choose.

Behind the demand:

• Camtek, which supplies inspection tools for advanced packaging lines, reports orders topping $600 million and expects its advanced packaging revenue to grow 70% from Q1 to Q4.

• TSMC and Sony have confirmed a $4.7 billion joint venture in Japan targeting image sensor chips, a separate packaging-adjacent expansion outside the AI CoWoS queue.

Austin: Supply-demand imbalances have different timespans. Substrates should clear first as an ABF line is a few hundred million dollars and 18–24 months of laser drills and platers, no EUV allocation required. A DRAM fab is $15–20B+ and three years.

CXMT DDR5 Yield Hits 90%, Pressing Apple on Memory Sourcing

Chang Xin Memory Technologies has crossed a yield threshold that few expected so soon. According to Chosun Ilbo and corroborated by Digitimes, CXMT’s DDR5 production yield on its 17nm process node now exceeds 90%, sitting just two percentage points behind Samsung. The company also entered the MSCI index in a record 14 days after its listing, the fastest inclusion in the index’s history. That combination of manufacturing maturity and financial-market legitimacy is what’s pushing CXMT into conversations it wasn’t part of a year ago.

Apple, facing an AI-driven DRAM supply shortage, has been testing CXMT memory in iPhones and MacBooks, according to reporting from multiple outlets, though Apple World Today expressed skepticism about how far those tests have progressed. The sourcing decision isn’t clean: U.S. export controls and Apple’s own supply-chain compliance requirements create what one report describes as dual barriers that complicate any shift toward Chinese suppliers. CXMT’s PC adoption, meanwhile, may stay confined to China and emerging markets in the near term, limiting the pricing pressure it can exert on Samsung, SK Hynix, and Micron outside those regions.

In related news:

• SK Hynix is reportedly reviving a NAND expansion inside China as YMTC and other rivals race to meet AI storage demand.

• Apple’s parallel effort to source NAND from YMTC faces similar geopolitical and compliance snags as its CXMT discussions.

AI Data Center Power Demand Sparks Moratoriums, Deals, and Gas Plant Fights

The EIA projects US power consumption will hit record highs in both 2026 and 2027 driven by AI infrastructure, and the political fallout is arriving faster than the substations. Chicago Mayor Brandon Johnson signed an executive order imposing a data center moratorium while new rules are drafted, joining smaller municipalities like Salix, Iowa in pumping the brakes. Amazon’s plan to build a 7.65 GW gas plant in Texas drew particular fury: CleanTechnica reported it would become the single largest pollution source in the country, and Pecos County residents have already begun voicing objections to the broader campus. Virginia’s grid is straining too, with Dominion pushed deeper into costly spot power markets by the Northern Virginia buildout.

Hyperscalers are responding with a mix of community money and regulatory compliance. Meta launched a $1 billion fund to support data center host communities and agreed to Texas grid and water standards that Governor Abbott announced publicly. Wistron’s CTO put the constraint plainly: power, not GPUs, is now the real bottleneck. Alpha Compute struck a $55 million deal to acquire Pennsylvania land and gas rights for a new campus, illustrating how directly operators are now chasing fuel supply, not just real estate.

Behind the demand:

• Michigan’s AG is targeting the OpenAI-Oracle data center deal on grounds that haven’t been fully detailed publicly.

• Crusoe is testing Aalo microreactors as a nuclear power source for AI data centers.

• AIG’s CEO says the construction boom is maxing out property and casualty insurers.

Austin: I live in Iowa and have never heard of Salix. Turns out its tiny and has a population of 295 people according to the 2020 census.

Someone in the industry or some PAC needs to get on top of this narrative ASAP.

Traditional media is going to take the headline “datacenter moratorium” from the agenda of a tiny rural town hall meeting and run with it.

And all those little stories are snowballing into one big out-of-control one.

Who will step up and be a thought leader and control the narrative?

Foxconn Profit Surges 35% as Taiwan ODMs Race to Add AI Capacity

Foxconn reported a 35% jump in quarterly profit driven by AI server demand, beating analyst forecasts and confirming that the assembly tier is capturing real margin expansion as hyperscaler spending holds. Foxconn assembles AI servers for Nvidia, and Bloomberg reported the result as a direct read-through on sustained AI infrastructure spending. The numbers arrived alongside a separate but telling move from rival Compal, which formally opened its Daxi AI server manufacturing center in Taoyuan, adding dedicated floor space for rack-level integration at a moment when physical build-out has become the binding constraint.

Compal’s Daxi plant effectively doubles the company’s AI server production capacity, according to Digitimes, and the company is targeting AI at 30 to 40% of total revenue by 2027. The bottleneck has shifted, too. Wistron’s CTO told Digitimes that power delivery, not GPU supply, is now the primary constraint limiting AI data center expansion. Wistron is also moving on that front, planning a 10MW AI computing center in Tainan to extend its own manufacturing footprint beyond pure assembly.

On an adjacent front:

• Compal’s Daxi facility sits in Taoyuan’s Daxi District, chosen for proximity to existing logistics and supplier networks in northern Taiwan.

• Foxconn’s Q2 result beat consensus forecasts across the board, with AI server revenue growth outpacing the company’s own prior guidance.

• Wistron’s Tainan computing center will carry a 10MW power capacity, reflecting how power infrastructure is now sized into facility planning from the start.

Austin: I love that Wistron is standing up 10MW of AI compute to help it’s own operations, plus “academic research at National Yang Ming Chiao Tung University, and national projects” per TaiwanNews.

When the ODM is dogfooding the product, you know the value is real.

Sector Watch

Compute & Edge

• Credo Technology scheduled its Q1 fiscal 2027 earnings call for September 1, 2026, covering results for the quarter ended August 1, 2026. (Credo)

• Ambarella will report its Q2 fiscal 2027 earnings on September 3, 2026, at 1:30 p.m. Pacific Time. (Ambarella)

• IBM and Together AI sign a $240 million multi-year deal to deploy an Nvidia HGX B300 inference cluster on IBM Cloud for open-source AI workloads.

Memory

• ChipMOS posted its highest quarterly revenue since 2014 in Q2 2026, up 28.7% year-over-year, swinging to a profit of NT$1.28 per share from a NT$0.75 loss. (ChipMOS)

• Samsung and SK Hynix shares rally as Temasek report boosts investor optimism on HBM demand outlook. (Bloomberg.com)

• Nanya Technology is set to become ASML’s newest EUV customer, signaling a DRAM technology upgrade at the Taiwanese maker. (Bits&Chips)

Optics & Networking

• Lumentum reported Q4 and full fiscal year 2026 results. (Lumentum)

• Tower Semiconductor and OpenLight expand the PH18DA InP-on-silicon photonics platform with a Cadence PDK, enabling integrated laser, modulator, and amplifier designs. (Tower Semiconductor)

• Google announces three new subsea cable systems across the Americas, linking Panama, the Dominican Republic, and Chile. (Bloomberg Tech)

Foundry

• Samsung and TSMC both push High-NA EUV adoption back to the 1nm generation around 2030, deferring the costly machines from current nodes. (TrendForce)

• Rapidus 2nm ambitions anchor Japan’s $430 billion 2040 national chip roadmap, with the government betting heavily on a single domestic foundry. (digitimes)

• aweXome Ray raises 7.5 billion won in a Series B bridge round to accelerate commercialization of its EUV pellicle membrane technology. (The Elec)

Packaging

• Avaco launches a pilot production line for glass substrate through-glass via (TGV) processing, advancing a key enabling technology for next-generation advanced packaging. (The Elec)

• Silicon Labs posts Q2 2026 revenue of $228 million with strong earnings growth, signaling recovery in its low-power wireless IoT business. (Silicon Labs)

• ASPEED Technology showcases open server management and security architectures at OCP APAC, advancing BMC integration for rack-scale AI servers.

Edge

• Silicon Labs posted Q2 2026 revenue of $228 million, reporting strong earnings growth in its low-power wireless IoT business. (Silicon Labs)

• AMD pitches its heterogeneous SoC architecture as the better fit for robotics and physical AI workloads, directly challenging Nvidia GPU dominance.

• Silicon Labs posts Q2 2026 revenue of $228 million with strong earnings growth in its low-power wireless IoT business. (Silicon Labs)

Policy & Trade

• US Congress presses the administration to close TSMC-linked loopholes that allow sanctioned Chinese entities to access advanced chips indirectly. (Businesskorea)

• South Korea sovereign wealth fund prepares to deploy more than 1 trillion won in AI and strategic-industry investments starting next year. (Bloomberg Tech)

• Adani Group secures an $800 million data center loan after US prosecutors dropped charges, unlocking fresh capital for Indian AI infrastructure (Bloomberg.com)

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Intel priced an upsized 210M share offering at $95 apiece, raising $20 billion to fund its AI foundry push in what is the company’s first public equity sale since its 1971 listing. TSMC meanwhile posted a record July revenue of NT$467.58 billion, up 44.7% year on year, and 6 Wall Street firms mobilize to raise $0.5T for AI capital investment. God help us all.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

Intel Prices Upsized $20 Billion Share Sale to Back AI Foundry Push

Intel’s first public equity offering since its 1971 listing closed bigger than anyone expected. The company priced 210M shares at $95 apiece, lifting the deal from an initial $15 billion target to a final $20 billion raise after demand outstripped supply. Underwriters also received a 30-day option to buy up to 31M additional shares, which could push the total haul higher still.

The raise came in a third above Intel’s original target, according to Bloomberg, a gap that reflects how quickly investor appetite built across the two-day book-build. Intel’s stated rationale leans on what it calls “unprecedented investment in AI compute,” pointing to physical AI, purpose-built silicon, and external wafer demand as the drivers of capital need. The offering is the largest equity capital event in Intel’s history and the most visible bet the company has made on the AI-era foundry model.

Vik: Dilution knocked the stock 4–5%, which is the market pricing the near-term cost. The upsizing is positive though. Institutions wanted more of this than Intel initially offered, and Intel priced it into a rally rather than out of a hole.

Austin: Folks, it’s simple. Think like a VC here. You backed a startup foundry, and the founders come back saying they've done the hard part: they have customers who want the wafers!!! Celebrate! OK. Now they need CapEx money to pull it off, and the round is dilutive. Fine! Dilute me. Build baby build. I'd rather own less of a much bigger Intel.

TSMC July Revenue Hits Record as AI Fills Every Wafer Slot

TSMC’s July revenue rose 44.7% year on year to a record NT$467.58 billion, the company announced, topping June’s NT$442.68 billion, which had itself been a monthly record. The January-through-July cumulative total reached NT$2.87 trillion, up 37.0% from the same period a year earlier. Nvidia-driven AI chip orders are the central engine, with advanced-node capacity running at full utilization across TSMC’s fabs, according to CNBC.

TSMC’s CoWoS advanced-packaging division is finally drawing close to meeting AI demand after the company spent years doubling capacity, according to Digitimes, citing TSMC packaging head Jun He. That supply-demand convergence arrives as TSMC broadens its footprint beyond logic wafers: the company and Sony have agreed to a $6.3 billion image-sensor joint venture in Japan, with Sony committing the majority of capital.

Vik: I heard TSMC discuss CoWoS packaging in a keynote at OCP APAC, where I am current writing this from. Can confirm from the key note that TSMC is close to, but not quite, meeting demand.

Nvidia and Intel Pull Wall Street Into AI Infrastructure Finance

Nvidia has formalized what Bloomberg is calling its role as “banker of choice to the AI ecosystem”, partnering with Apollo, BlackRock’s Global Infrastructure Partners, Blackstone, Brookfield, Goldman Sachs, and KKR to mobilize more than $500 billion in third-party capital for AI compute infrastructure. The platform shifts the weight of financing the AI buildout off corporate balance sheets and onto the broader financial system, with the six firms committing capital across debt and equity structures.

The credit markets are moving in parallel. Lambda Inc., an AI cloud provider backed by Nvidia, is selling a loan against risky debt markets to fund a chip procurement deal, a sign that syndicated credit is becoming a routine tool for AI hardware finance. JPMorgan is leading a $441 million debt deal for an AI infrastructure firm, and the SEC has exempted data-center bonds from key securitization rules, removing a structural barrier that had constrained that corner of the market. Bloomberg flagged the Nvidia capital platform as potentially “double-edged,” given how much systemic exposure now concentrates in AI-linked credit.

Vik: I’ll just drop Jensen’s X post here. Nothing more to say other than this investment cycle is getting out of hand. Make hay while the sun shines.

Austin: We treat technical innovation as good by default and financial innovation as bad by default. I feel that reflex too, but I’m trying to set that aside and understand this more. Need more financial folks to help unpack both sides. Gavin Baker, keep educating us here!

Sector Watch

Memory

• SK Hynix-backed investment vehicle becomes Kioxia’s largest shareholder after Toshiba trims its stake, deepening Korean memory influence over Japan’s leading NAND producer. (digitimes)

• Powertech Technology commits $400 million to a Singapore advanced-packaging venture with AMD as its first client, targeting 2027 shipments. (TNGlobal)

• ChipMOS posts a 43.6% year-on-year July revenue increase, setting its highest monthly revenue since 2014 on surging memory test demand. (ChipMOS)

Foundry & Packaging

• Amkor Technology is mulling a stake sale in its $1.5 billion China packaging unit, a potential strategic retreat from China advanced-packaging amid geopolitical pressure. (bloomberg.com)

• Compal is expanding manufacturing capacity in Taiwan, Vietnam, and the US to capture rising AI server assembly demand. (Nikkei Asia)

• UMC revenue climbs to a 45-month high as wafer prices rise, signaling mature-node demand recovery beyond AI-driven leading-edge activity. (digitimes)

Power

• Navitas files a patent infringement lawsuit against Renesas Electronics over gallium nitride power semiconductor technology. (Reuters)

• Bloom Energy says its fuel-cell systems reduce water consumption at AI data centers to near-household levels, positioning them as a dry-cooling alternative. (Energies Media)

• Samsung Electro-Mechanics MLCC prices surge 30% across the board as AI server and advanced-packaging demand outpaces passive component supply. (Chosunbiz)

Optics & Networking

• Credo Technology contributes its OmniConnect scale-in interconnect solution to the Open Compute Project, targeting the AI inference memory-wall bottleneck with an open ecosystem approach. (Credo)

• MaxLinear launches its RackCommander control-plane portfolio alongside intelligent eFuse and USB-to-UART solutions targeting rack-scale AI infrastructure. (MaxLinear)

• Point2 closes a $136 million Series B backed by Arm, LB Investment, and Maverick Silicon to commercialize its e-Tube AI data-center interconnect platform. (Point2) — Vik covered this company here.

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Things we cover:

• The proposed ban on Chinese optical transceivers

• Why the malware justification doesn’t hold up

• AMD’s strong earnings and surprising CapEx

• Volta Infrastructure’s creative financing model

• Anthropic’s massive compute needs

This podcast is lightly edited for clarity.

A New News Take Format

Austin: All right, hello everyone. I’m Austin Lyons from Chipstrat. With me is Vik Sekar from Vik’s Newsletter, and we are bringing you a news flash—a news take from Semi Doped. This is a little bit different than our regularly scheduled programming. Vik and I decided that lately, every week or so, every couple of weeks, there’s just some really interesting stuff that we’re really itching to talk about and it doesn’t always align with our schedule of when we are normally going to record.

And so we just thought it’d be fun to have these shorter news take episodes that we bring to you. So, Vik, what is it that made you want to jump on and talk this week? What are we talking about today?

Vik: It’s this whole Reuters news article about how the Trump administration is proposing to put a ban on Chinese optical transceivers. And it stirred up quite the panic in the markets because you really can’t build out an AI data center without optical transceivers and whether people realize it or not, a bulk of this entire optical component assembly stuff, including the pluggable modules, are actually assembled in China.

So, it was quite a shock to everybody and everybody was scrambling to make out what’s going on here. And at that time, I was like, I think we should just cover this at least because it’s an interesting thing to talk about because it’s just like what’s going on? What if we are cut off from optical transceivers tomorrow, what would happen or why we think it will actually happen or not happen.

So, that’s why I was like, let’s do a news flash today.

Can the US Ban Chinese Optical Transceivers?

Austin: Yes, totally, which is good. So let’s get into it. I too, I woke up and I read this and my initial reaction was, you can’t just cut these off from China immediately because you’re not going to backfill that supply immediately from the United States, right? So there would be if you shut it down, there would be a period of time where it’s just like, all right, we just have less optical transceivers. At the point in time when we’re trying to build out data centers at scales like we never have before. But yeah, walk me through your line of thinking when you read it.

Vik: All right, yeah. So if you’re watching this on YouTube, I just have the article up on the screen. So we can actually look at what’s going on here. Essentially, the news that was reported on August 4th, says the Trump administration is drafting a ban on US imports of new models of Chinese data center components as it seeks to protect the infrastructure that undergirds the AI boom.

Okay, they got some part of it right. Basically, it really is an important part of the AI boom, right? Because without optical interconnects, you can’t do any scale-out or scale across or even hook up to the data center. You can’t even do inference or training or whatever. It’s a big part of the AI infrastructure, so that’s pretty good. So the specific ban actually comes down to Chinese optical transceivers, which we’ve spoken on this podcast. It just converts light to electricity and back again because light travels much better distances at a much faster rate. So, compared to electrical transceivers, optical transceivers can connect longer distances. So, we’ve done a whole episode on this—the basics of transceivers and networking and all that—which you should check out if you’re wanting to get more into this.

The Malware Justification

Vik: So, but the whole thing was that this was the dumbest thing I saw in the article. I’m going to read this out, okay? Like after this, I’m going to ask you what do you think about this because it’s really dumb. It says “the move not previously reported, aims to prevent Chinese firms from stealing data, installing malware or disrupting service at US data centers, which house the chips to train and run AI models.”

Like, why do you think that banning the shipment of optical transceivers will prevent the stealing of data and installing of malware? It literally has nothing to do with it.

Austin: Right, right. I too was struggling to understand this and I kind of went down a little bit of a research rabbit hole to figure out like, is this even possible? The question is, if a Chinese company assembles an optical transceiver, is that actually a security risk? And so, by the way, I kind of emphasized assembles because at the end of the day, what do these optical transceivers have in them? A lot of times it’s a Broadcom or Marvell DSP. It’s re-timers, drivers, TIAs, all these various components, a lot of which actually will come from American companies, not necessarily Chinese companies. So, these particular transceiver companies—Inlight, for example, or Eoptolink or these other ones—a lot of it is the assembly and the final kind of cabling and putting everything together.

And so the question is like, well, where are they going to put malware? What are we talking about here? If they’re sourcing a lot of the components. And the one thing I could find is that there’s often like a little MCU, like microcontroller that has some firmware on it. And that firmware can be written to by the vendor. But as far as I could tell, and I would, of course, love some transceiver person in the industry to tell us more about that. I did find some links. It was like an OIF, Optical Internetworking Forum or something that had these slides. It was in our Semi Doped Daily. I should have pulled it up this morning. But it was like, okay, it is very—it’s a normal thing for optical transceiver companies to have an MCU that has firmware on it and it can be programmed. And and sometimes they make it so you couldn’t just go in and read it back out yourself to be like, what did they put on here? You know, like, I want to audit this. But it’s not clear to me that after it gets shipped, they would have any way to get in and upgrade that firmware. So it’s not like I could sell you my transceiver and then remotely connect from China and then put all this malware on it and do something.

Vik: Yeah. These pluggable transceivers don’t have too many components, honestly. They have an amplifier on the transmit side and they have an amplifier on the receive side. And then they have some conversion circuits. And that’s about it. Then you’ve got some optical connections like fiber attach units or whatever if you want to connect to the optical engine. That’s it. What else is here? Like in an optical engine, there’s nothing and then there’s like a fiber that plugs into it. There’s no malware or stealing data or whatever is going on here. Oh, you know what’s ironic about this is that they want to make this whole ban to prevent the disruption of service at US data centers.

Austin: Which the ban would do that.

Vik: Exactly. The ban would exactly do what you’re trying to avoid.

Market Reaction and Supply Chain Impact

Austin: Yeah, totally. Totally. So you do wonder, of course, with things like this, is it you kind of wonder, is it the government saying, you know, we want to continue to put pressure on China and here’s yet one other angle. It’s not Nvidia GPUs, it’s somewhere else in the supply chain. Can we put the squeeze on? Regardless of its technically sound or not. And in fact, it’s kind of a technically complicated area. So if we just tell people, hey, optical transceivers from China are bad, they could have malware, maybe most people will just believe it at face value. So you wonder how much it actually has to even be true.

Vik: Oh, speaking of Washington D.C. Yes, I’m glad you said Washington D.C. because read this next. “Transceivers definitely pose a risk,” said this person who’s an AI policy expert at Washington D.C. “As data center build out scales up, you want to make sure the data center supply chain is secure from the get-go.” Like, again, there’s nothing about security in this thing. These components have nothing in them that you can hack into or install a virus or something. You know the best analogy I have for this? It’s like saying, if you hook up this USB cable to your computer, you’re going to get a virus. It’s just a USB cable. Like why would I get a virus? Exactly. You won’t.

Austin: Right, right. Yeah, they just transmit on it. Yeah. I did find, yeah, I did find this, okay, it’s OIF, Optical Internetworking Forum and they had this webinar and there are some slides around like a little MCU on these transceivers for some little bit of firmware stuff. So there is a little bit of trusting the module vendor, but again, and we can put a link in the show notes. But again, it’s very unclear that it is an attack vector.

Vik: Yeah, there are some management services that actually go on inside. So that’s there. Yes, there are some functions that do this kind of stuff. But one other thing is that the moment the biggest company that was hit in China for this is Zhongji Inlight, right? They seemingly contribute to about 34% of the global sales of transceivers, which some analysts actually revised up from what this Reuters article calls to be 27%. So, down here it says Inlight has a leading 27% share of the global transceiver market. But some people said it’s actually a little bit more than that. And there are others too in the Chinese supply chain who make these things. And if you add them all up, they constitute about 50% of the global optical transceiver market.

That is a significant amount of supply to just ban because you can’t get these things anywhere else. And I have to explain what that means because the shares of Lumentum and Coherent and all these things and Applied Optoelectronics goes up when this news came out. But none of these companies other than maybe Applied Optoelectronics to some small fraction, actually assembles transceivers. Lumentum and Coherent are still going to make lasers, but they kind of make the hard-to-make high-end content of an optical transceiver, like the 200-gig EMLs and ultra-high power lasers that aren’t really accessible to too many Chinese modules makers or whatever. So, what the Chinese module makers actually do is they work on this very low-margin stuff, but it’s a very essential portion of the market.

And without them, you can’t have optical interconnections in the data center, right? So, I don’t know how to think about this, but ultimately, if there is nobody to package these optical transceivers into a pluggable module, then I would imagine that Lumentum and Coherent would be upset, like affected by the situation because their sales would go down. So you actually want people shipping pluggable modules, right? So, I’m not sure why Lumentum and Coherent went up as soon as Chinese ban was supposed to show up.

Austin: Yes, okay. So I had that take as well, which is like, okay, look, if there’s a fixed supply and then we take the Chinese supply off the table, that doesn’t mean that immediately Lumentum and Coherent are going to sell more. They still have a fixed supply, right? And so it’s like, okay, maybe Fabrinet and these other contract manufacturers could try to pull some supply online and then maybe that would be allocated to the Lumentums, Coherents and whoever, but none of that happens immediately.

So actually just immediately, the only thing that happens is that now we’ve traded security concerns for actually building capacity, right? And so this is actually very European in some sense, which is just like, oh no, we’re scared about something. Let’s just put a bunch of regulations and slow down the building of it whatsoever, because there could be a tiny attack vector that Austin says doesn’t really seem possible. Let’s just stop building data centers because we just cut off supply to all the interconnect cables.

Vik: Yeah. And there’s another complicated angle to this because Terrahop, which is actually the non-China arm of Inlight is actually a subsidiary of the Chinese company Inlight. But they are entirely operated out of Singapore and they don’t have anything to do with China. Like none of the parts come from China, none of the assembly happens in China. Everything happens in Southeast Asia, but now what would you do with those? Like how would you deal with Terrahop? Would you ban them? Would you not ban them? It’s very gray area. And they also said that this ban only applies to new modules. But what does new mean? These things have revisions all the time. What is new? Like a new slightly different revision V2 to V3 makes it a new product? Like changing a slight orientation of a part on a module makes it a new product? What is it? So I don’t think anybody knows. But do you actually think that this is actually going to come into play and actually last?

Austin: So I don’t think so. I don’t see. I think enough people, I mean, come on, if you’re Broadcom, Marvell, Coherent, Lumentum and everyone in the supply chain. Oh, and by the way, if you’re Microsoft Azure or OCI or anyone who’s building out data centers, like everyone’s going to literally say like, hold the phone, this is not right. This is not it. So I don’t think this is going to happen.

Vik: And I don’t think any US maker is going to—I don’t know—like Fabrinet or all these companies are going to go off and immediately say, you know, let’s start building capacity. Yeah, this is our business model because you know, before you know it, like in a few months if this reverses and then all that capacity is gone to waste, nobody’s going to do anything.

Austin: Correct. Yes. No, you make a very good point, which is like no one can proactively take action on this because it would be manufacturers who’d have to try to ramp up supply and that is a very expensive and kind of one-way door, right? You buy, you have shells, you build, you buy tools, you stand up a supply line and then all of a sudden the government decides, never mind, we’re not going to do this and you’re like, oh well, now we have all this excess capacity.

AMD’s Strong Earnings and Surprising CapEx

Vik: Oops. Totally. Awesome. I think we’ve hit on that topic pretty nicely. I don’t have anything else to say about it, do you? Let’s—No. Okay. Because we have to see how it rolls out. What’s your take on the whole AMD earning scenario? Like they seem to have posted some really good earnings but the stock fell and people are like questioning something. What’s going on there?

Austin: Yeah, yeah, yeah. So, okay, AMD, they had good earnings. They are record revenue of 11 and a half billion, up 50% year over year, 13% quarter over quarter. Their data center segment, 6.7 billion, which is up 107% year over year. And is importantly is now 58% of their total revenue. So they have shifted from a sort of consumer client PC, client graphics company to a data center company, which you would hope that they would do that, right? So they’re actively executing on that. Epyc CPU demand is good. Helios has good reception and is shipping end of Q3, Q4, Q1, right? So everything at a high level looks good. Now, the stock dropped after hours after their earnings call, and so then there was a lot of like, oh no, people must not—what don’t investors like about AMD’s earnings?

And there was a couple things that people were poking on. One, it was okay, well, how much growth is actually happening with GPUs? Obviously CPU, agentic CPU demand for Epyc is very strong. Helios is promising, but it hasn’t really shipped yet. And there were some comments about acceleration and like Stacy Rasgon, if you listen to the call, he was poking on it saying like, oh, well, is it actually not accelerating as much as possible or because there’s like quarter-over-quarter acceleration versus just like half-over-half and whatever.

There were some surprises about spending 800 million in CapEx instead of the expected maybe two or 300 million. And there are some legitimate on the one hand, some of that spend might be into their own compute infrastructure. But there’s some concern that some of that is actually needed to, for example, get supply for substrates and help OEMs and ODMs get to the finish line with these rack-scale Helios and stuff like that. And so the nuanced argument there is that it’s not so simple to be fabless anymore. Like you used to be a fabless company and not have to take on a lot of that, have that skin in the game for getting allocation to certain things. But now that it’s hard to get substrates, it’s hard to get memory or anything like that. The point is like, hey, wait a minute, AMD is supposed to be a fabless company, but they’re having to put their own money in to get allocation. But again, that doesn’t necessarily say that AMD is an unhealthy business.

Vik: I mean, Nvidia had this whole CPX thing for pre-fill, but that we never heard of it again. So maybe disaggregating pre-fill and decode into separate hardware SKUs wasn’t the greatest idea.

Austin: Well, okay, so that’s a great question and a great pushback. The solution was instead of to say, let’s have GPUs some with a lot of HBM, some without, then they actually, of course, came in and did the whole SRAM thing and said, wait a minute, what if we use the SRAM for decode and then we keep our HBM for the pre-fill? And so that would also continue to point out that AMD doesn’t really have an SRAM offering, although they did just launch or make that announcement at Advancing AI about partnering with Cerebras to sort of fill—yep, yep, to fill that out. But again, I think we’ll maybe we’ll see more from AMD here on flushing out what is their strategy, where does SRAM come in, where does GPUs with less HBM come in? So I think there’s probably going to be more coming from AMD. That that’s my takeaway.

Volta’s $10 Billion Creative Financing Deal

Vik: Okay. Yeah, that’s an interesting, interesting approach. That’s a good explanation actually. I don’t have anything to add to it, but we’ll see how it rolls out from here. Because I wanted to go on to the next piece of interesting news, which is this company called Volta Infrastructure. Have you heard of this company?

Austin: I didn’t until you texted me, to be honest.

Vik: Okay. So let me run through what this thing does. This is very—this is quite amazing to me, okay? Because there is this company called Volta Infrastructure, which is a London-based company. Not to be mistaken for another company of the same name, which is Singapore-based and also does something very similar. I was totally confused when I saw the website. Actually, I should actually pull that up because it is quite nice to see what it is that they are trying to do. And so I’m just going to share basically volta.com and go from there. Okay. So this company was very interesting only because this company has been around only for about six or seven months, okay? This company, let’s say, as old as our podcast as we record this right now, because it started it.

And they seemingly have gotten a $10 billion deal with some unknown AI lab or something, which later I think Bloomberg, was it? Yeah, reported that it’s actually Anthropic who has put in a $10 billion computing deal with this new cloud startup that’s been around only six or seven months. So you’ve got this big player coming in and just putting in a compute deal that’s worth nine figures and you’ve got this company that becomes instantly a multi-billion dollar valuation company. So I was like, wait, what does this company even do that like, how can they get a $10 billion deal in compute in six months? What can I learn from this for Semi Doped podcast, right?

Austin: Yes, yes, my original thought was like, oh man, they’re the same age as Semi Doped. Dude, we picked the wrong industry. Podcasting, you know.

Vik: I know. Why can’t we start a compute—yeah, why can’t we start a new cloud? Yeah. Okay. Let me explain the idea of this, okay? The fundamental idea behind this company is that they treat it like it’s infrastructure. And they treat this as basically institutional grade infrastructure build-out. And I had no idea what that meant, okay? So I was like, okay, let me dig into this a little bit more. And it’s interesting because whenever you borrow money to build infrastructure, which can be like roads or something that you can just get money out of on a regular revenue basis, right? Just let’s use the example of roads, right? Infrastructure debt to build out roads is very different from what you would borrow to do something like a VC or a corporate financing deal. And so the whole idea is that you treat this asset, whether it’s roads or compute, as a contracted but predictable cash generator. So it generates cash. Like a toll road collects tolls, and it’s going to continue to do so for decades. Like a power plant sells electricity for a very long time, often 15, 20 years.

The bet is that AI is not like a data center. We call it data centers, but it’s really not that because there is a lot of sharing and there’s a lot of virtualization and you get part of the compute in a data center typically in the old days. Compute is very different, like it is a token factory. It’s an AI factory. Think of it as infrastructure and that is factory. So whenever you say that I can produce revenue like collecting tolls for a long period of time, institutional lenders, right? They tend to give this loan to you at lower interest rates, which means that they are not betting on growth or some fixed outcome, but they know that you’re going to start generating revenue by collecting tolls immediately. So the cost of the capital, right? Because you are getting this at a lower interest rate, means that the person building out with them gets compute at a lower price somehow, right? So that’s where this whole thing is built out. So this is their whole idea behind building data centers, from capital to tokens, for companies like perhaps Anthropic who’s coming through the door.

Austin: Sure, totally. And I know we’re short on time, so I’ll keep my take short. So first of all, I’ll say that Jensen would be very happy to hear you talk about token factories and financing it like a utility, and that’s how he thinks about it too. So, you know, congrats on thinking the same way as Jensen. So, okay, there’s one other way that I would approach this. When I started to think about this, I thought like, okay, let’s say it’s Anthropic. Anthropic says, oh, wow, we need a bunch of Nvidia GPUs. And let me remind people that Anthropic traditionally used Trainium, and then they also said, we need more compute, and so they started using TPUs. And like nine months ago, there’s an announcement where Microsoft, Nvidia, and Anthropic said like, hey, there’s this three-way partnership, and Anthropic’s going to commit to $30 billion of Azure compute plus up to 1 gigawatt additional initially on Grace, Blackwell, and Vera Rubin. And Nvidia was investing, Microsoft investing. Okay. And so it was like, oh, wow, this is actually upside TAM for Nvidia, which I think people forgot was one of the two biggest model lab companies wasn’t actually really using Nvidia yet.

Okay, so now, let’s say you’re Anthropic and you’re like, great, we want even more Nvidia. How do you find it? Every large Neocloud and large CSP who has Nvidia compute already has customers that it’s allocated to. So where are you going to find it? Okay, well, you just maybe Jensen says, hey, I’ll allocate you some. And then you say, okay, well, I have to find power. Okay, so where do you get the power and and someone to operate it? Well, basically, in this case, this Volta is the balance sheet company that just started, but the operator is actually this crypto miner like Bitdeer or something like that. And so there’s an existing, yeah, existing crypto miner that has experience operating data centers, but they’re not going to be able to take on any of the balance sheet. They’re not going to get that low cost of capital financing. And so I think this is also just a clever way to say, let’s start a new company, clean balance sheet, and they’re going to receive the money and they’re going to be sort of like the parent, but actually they will pay Bitdeer for power and operations, and Nvidia will help make sure that some new GPUs get built and allocated and set up there, and then Anthropic can—it to me, it feels like the fastest way for Anthropic to spin up more Nvidia GPUs was essentially needing a clean balance sheet to borrow against. Someone to come in and play that role. But it is obviously, yeah, it’s financially creative.

Vik: It’s amazing. Yeah, it’s financially creative. And I’m like, wait, what’s going on? Like, people just drop like 10 billion just like that nowadays into a company we’ve never even heard of. But it’s fascinating. We live in fascinating times. It’s great. Like I have to work for a long time for that much kind of that much money, you know.

Austin: I know. But now think about if you’re Volta, you’re like, yeah, we’ve got one customer and we’ve got $10 billion. But on the other hand, it’s like, dude, you guys have one customer. Like, what’s the long-term game plan? And I’m sure the game plan is like, just keep making that customer happy as long as possible. And then maybe eventually win some other customers. But then that’s essentially every other Neocloud in the world is like, we’ve got one big customer and we’re hoping to differentiate.

Vik: That’s true. So they’re like, basically two things, right? Like, most startups can’t even say, yay, one customer, right? So one customer is amazing. So the second thing is that if the customer is like Anthropic, there’s a big customer to nail on level one, and you’ve already nailed Anthropic. Everyone is going to follow suit, right? The pack of cards, the dominoes will fall. Everybody’s going to throw compute money everywhere, and CapEx is going to continue going to the trillions. Yeah, I don’t know when this—this is very interesting, so I thought we should cover it on the podcast. Anyway, enough of that. Let’s see what happens. It’s nice to keep a tab on these kinds of creative financing deals. You know, we are not really finance guys, but I love to understand the financial creativity behind how some of these things work. Or maybe it’s just new to me. So either way, I have fun.

Austin: Absolutely. It is going to be—it is the story that’s woven through the period of history we live in right now, which is very interesting technical innovations as we move to data center scale computers, and then very interesting financial innovations to finance it all. And so with that, we’ll call this episode a wrap. Thanks for listening, guys.

Apple is reportedly testing CXMT memory chips for iPhones and MacBooks, which would mark a significant milestone for Chinese DRAM clearing US performance benchmarks. Anthropic is building its own chip team with Samsung eyed as foundry partner, and TSMC’s 2nm capacity is already sold out through 2028 at $30,000 a wafer.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

Apple Tests CXMT Chips for iPhones as Chinese DRAM Clears Speed Benchmarks

Apple is testing memory chips from China’s ChangXin Memory Technologies for use in iPhones and MacBooks, according to a Wall Street Journal report, even as US regulatory pressure complicates any formal supply agreement. The outreach comes amid a broader tightening in global DRAM supply driven by AI demand, and CXMT has reportedly declined to offer the kind of pricing concessions Apple typically extracts from suppliers. US export-control rules currently block CXMT from supplying Apple with the custom-designed chips the iPhone requires, meaning standard DRAM modules are what’s actually under evaluation.

On the performance side, CXMT chips hit DDR5-8800 MT/s on AMD’s AM5 platform, matching speeds associated with SK Hynix’s top-tier modules. That result, demonstrated on the X870E chipset, puts a Chinese vendor on competitive footing with established Korean suppliers for the first time in the high-speed desktop segment. Tuttle Capital’s HBMX ETF recently added CXMT exposure, calling it a $488 billion company that most US investors cannot access directly. CXMT also secured entry into the MSCI China index, a move that may draw additional institutional fund inflows.

Vik: Regardless of whether they get to use Chinese memory supply or not, Apple 18 Pro models are estimated to have a higher selling price according to TrendForce.

Austin: Bold move by CXMT to reportedly hold the line on pricing. At first blush it seems the wrong move; wouldn’t you want to make friends with Apple now by giving them a little discount when times are hard, and trust the good relationship would pay back over time? Except, that’s not how Apple works. I don’t think CXMT favors now would result in any extra business whatsoever from Apple in the future. And if you believe that, you might as well charge them a pretty penny for today’s dance.

Also — dang, 42% of BOM for memory in that cart. OUCH.

Anthropic Forms Chip Team; Willing to pay $$$ to Teach Chip Design to AI

Anthropic is assembling a dedicated silicon design group to build custom inference chips for its Claude models, with Samsung reported as the likely manufacturing partner. The move follows a pattern set by Google with its TPUs and Amazon with Trainium: as inference workloads scale, buying compute from Nvidia becomes a margin problem, and owning the silicon solves it.

Anthropic is paying engineers focused on teaching AI models to assist with chip design close to $1 million annually, while those building the first ASIC directly earn between $320,000 and $485,000. The salary gap reflects how much the company is betting on AI-assisted design workflows, not just conventional hardware engineering. Claude demand straining its existing compute strategy is the pressure driving the timeline. Custom silicon takes years to tape out and qualify, so the team Anthropic is hiring now is building toward a future where the company isn’t entirely dependent on GPU allocations it cannot control.

Vik: I can’t believe teaching AI to design chips has a 3x factor over designing the chip yourself in terms of leverage. This actually does make sense because you teach AI to design a chip once and reap the benefits forever going forward. Human capital does not have the same leverage. Regardless, this kind of stuff is crazy, and I have seen nothing like it in the 15 years I worked in the semi world.

Austin: Lesson for current undergrads? Take both. ML and EE, not just one. Learn to train models. Learn to design chips too. Actually, zoom out. The move is to pair AI training with any domain, and you can train AI to do that domain’s work.

TSMC Capacity Sells Out at Every Node as AI Locks Bookings Through 2028

TSMC’s 2nm wafers are priced at $30,000 each with capacity already committed through 2028, and that’s before the company has finished building everything it’s planning to sell. The foundry accelerated 3nm output ahead of schedule and has secured land in Taiwan for two 1.4nm fabrication plants, a site acquisition that moved only after landowners calculated what they’d be leaving on the table by refusing. Monthly sales rose 45% as AI hardware spending held firm through broader market jitters, and full-year capital expenditure is tracking toward $64 billion.

The CoWoS advanced packaging hub at Longtan is sold out globally, with TSMC reviving that site to serve both 1.4nm production and the packaging demand that AI chip builders cannot satisfy elsewhere. Not everything in the expansion is logic-focused: per TrendForce, TSMC and Sony are reportedly planning a JPY 1 trillion joint venture in Kumamoto to manufacture image sensors, with Reuters pegging the investment at $6.3 billion and mass production targeting 2029. The deal extends TSMC’s Japan footprint, already being analyzed by Digitimes as an advanced packaging push beyond the company’s original Kumamoto wafer fab.

Austin: TSMC continues to be such an interesting company given the market dynamics right now. And just they released July’s monthly revenue, which is also one-of-a-kind. 5.6% MoM, 44.7% YoY.

Key Data

Nice chart from from Creative Strategies that shows why it’s different this time.

Sector Watch

Memory

• SK Hynix board formally approves $38 billion investment split across Yongin and Cheongju fabs, with additional shareholder-return measures promised in Q3. (Reuters)

• SK Hynix mulls strategic options for its Chongqing, China facility, including bringing in an outside investor to accelerate an exit. (Bloomberg Tech)

• SK Hynix and SanDisk unveil the first HBF standard specification, positioning High Bandwidth Flash as a new memory tier for AI infrastructure. (EE News Europe)

Compute

• Moore Threads files for a Hong Kong listing after reporting 147% first-half revenue growth, seeking public capital to fund AI GPU expansion. (Bloomberg.com)

• Cambricon reports 6 billion yuan in H1 revenue and 2.3 billion yuan net profit, doubling year-on-year as China AI chip demand surges. (digitimes)

• Intel appoints Dean Jarnac as executive vice president and chief sales officer to strengthen customer engagement and accelerate revenue growth. (Intel Newsroom)

Foundry & EDA

• Siemens agrees to acquire EDA software firm Precision Innovations, extending its electronic design automation portfolio. (Evertiq)

• Synopsys demonstrates CXL 4.0 IP running at 128 GT/s, claiming 3-6x KV cache offload improvement over SSDs for AI inference workloads. (StorageReview.com)

Packaging

• ACM Research receives its first production and evaluation orders for the Ultra ECP ap-p horizontal panel electroplating tool, advancing large-panel advanced packaging toward volume manufacturing. (ACM Research)

• Ibiden raises its full-year profit forecast as demand for AI server substrates and ABF buildup substrates strengthens across hyperscaler customers. (digitimes)

• Ajinomoto reports surging demand for its ABF substrate materials, riding the advanced packaging boom driven by AI chip production ramp. (digitimes.com)

Optics & Networking

• Zhongji InnoLight seeks a $7 billion Hong Kong listing focused on AI data center optical interconnect products amid booming transceiver demand. (Indiatimes)

• Kioxia demonstrates a GP1 enterprise NVMe SSD hitting 10 million IOPS at FMS 2026, targeting AI and cloud storage infrastructure deployments. (ServeTheHome)

Edge & Automotive

• LX Semicon begins mass production of South Korea’s first domestically developed automotive MCU, supplying Hyundai and Kia in a semiconductor localization milestone. (The Korea Times)

• MediaTek is committing $5 billion to Intel Foundry for advanced chip manufacturing, a significant vote of confidence in Intel’s foundry ambitions. (天下雜誌)

• STMicroelectronics launches the ST54M secure element with hardware-based post-quantum cryptography, targeting IoT and edge device security.

Policy & Trade

• US government reviews offshore access to Nvidia chips after AI capability gains by Chinese entities using third-country procurement routes. (Bloomberg.com)

• India plans polysilicon production incentives to reduce its dependence on Chinese supply in the solar and semiconductor materials chain. (Reuters)

• South Korea sentences a former SK Hynix employee to prison for leaking proprietary chip technology to a Chinese firm, per Yonhap. (Reuters)

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The lab’s first home fit the setting better than anyone planned. It was a shed in Mountain View that had previously been used to pack apricots for shipping. At the time, the valley’s economy still ran on orchards. Locals called it the Valley of Heart’s Delight, and apricots, prunes, and cherries covered far more acreage than anything electronic.

The physicist recruited a team he called the finest group of scientists ever assembled in one place, then spent the next two years driving most of them away. That December, months before his staff started leaving, he shared a Nobel Prize in Physics for work completed a decade earlier, at the same lab he had just quit.

The following September, eight of his researchers walked out and founded a company a few miles away that would go on to seed dozens of others. Their old boss never forgave them for it, and coined a lasting nickname for the group.

Name the company born out of the apricot shed and the nickname.

CLUES

His backer, chemist and instrument maker Arnold Beckman, would have preferred a site near his own headquarters in Fullerton, but the founder got his got his way.

TIL: Shockley - The man who flunked the test for gifted children

SPOILER ALERT: ANSWERS BELOW

Two boys were screened and rejected. Both of them went on to win the Nobel Prize in Physics. One was Luis Alvarez. The other was William Shockley, tested twice as a boy and scoring 129 and 125, who would spend the middle of his life putting the silicon in Silicon Valley and the end of it insisting that numbers like those were the measure of a human being.

Shockley told the story on himself with visible relish, and it is worth saying that he is the source of it; it first reached print in an interview he gave in 1980, and his biographer Joel Shurkin later documented the scores, adding that an adult test placed him somewhere around the 90th percentile. Nor is the moral quite as clean as it looks. A 2020 simulation study concluded that Terman was never realistically going to catch a future Nobelist, because the prize is too rare and his threshold too high. The smaller, funnier fact stands on its own, though. Of the 1,528 children who did make the cut, tracked for decades, not one ever won a Nobel or a Pulitzer!

The boy who failed had an unusual start even by Palo Alto standards. He was born in London in 1910 to American parents and brought back to California at three, the son of a mining engineer who spoke eight languages and of the first woman in Nevada appointed a US deputy mineral surveyor, in 1906. His parents disliked public schools and his tantrums were violent, and between the two convictions they kept him out of school until he was eight.

What physics he learned early, he got from a neighbor who happened to teach it at Stanford. From there the path straightens out into something conventional and fast: Caltech, then MIT, then a doctorate on the band structure of sodium chloride, and then, in 1936, Bell Labs, which had just decided it wanted solid-state physicists and hired him almost immediately.

The problem he was handed was the one that would define him. Bell wanted something solid to replace the vacuum tube, and Shockley proposed a field effect device that refused, year after year, to work. The war interrupted the argument. Somewhere around 1939 he and a colleague, James Fisk, are said to have worked out a design for a chain-reacting uranium pile, on the insight that lumps of uranium rather than a uniform mass would let neutrons slow enough to be useful; the report was classified on arrival, and lore has it that Manhattan Project physicists later had to derive the same ideas from scratch.

Instead, Shockley spent the war on operations research, redesigning depth-charge patterns and convoy tactics and bomber training, and an old and uncorroborated story has him deducing, purely from statistics, that German bombers carried no radar, without ever laying eyes on a bomber or a convoy.

He came back to Murray Hill, to the same unworkable device, and this time the group cracked it without him. John Bardeen worked out why the field effect kept failing, surface states were screening the field, and he and Walter Brattain followed that insight to the point-contact transistor, demonstrated to Bell Labs management on December 23, 1947, while their nominal boss was largely at home pursuing ideas of his own.

Then the lawyers made it worse. Bell’s patent attorneys found that Julius Lilienfeld had filed a field-effect patent in Canada in October 1925, and to steer clear of it they built the application around Bardeen and Brattain’s device alone. The idea that had started the whole program was Shockley’s. His name was on none of it. And he threw a tantrum like the ones from his childhood.

Within a fortnight he was in a Chicago hotel room for an American Physical Society meeting, sitting out the New Year’s Eve party downstairs and filling some thirty notebook pages with a semiconductor sandwich that might do the same job more robustly. It did not quite cohere and he put it away. On January 23, 1948, at home before dawn, it did: the junction transistor, the structure that would carry the industry until MOS displaced it in the 1970s. He told neither colleague. When the invention went public that June he was the most visible man at Bell Labs, and here is the part that complicates the villain: he corrected reporters who gave him sole credit, writing to Newsweek to say plainly that the invention belonged to Bardeen and Brattain. It changed nothing. Bardeen left in 1951. Brattain refused to work with him again.

Aside: We just think Shockley was making it clear that Bardeen and Brattain invented the point-contact design, he cleared the historical and legal path to claim undisputed, sole credit for his own subsequent, superior invention: the junction transistor. Ultimately, the Nobel Committee recognized the distinct but interconnected nature of their work, jointly awarding all three men the Nobel Prize in Physics in 1956.

All three shared the Nobel in 1956, and that same year Shockley opened a semiconductor lab in Mountain View, chosen partly for Stanford, partly for the weather and partly because his mother, then in her late seventies, lived nearby. He recruited superbly and managed catastrophically.

Convinced that a secretary’s minor cut was sabotage aimed at him, he demanded lie detector tests. He bet the company on the four-layer diode and set silicon transistor development aside. In September 1957 eight of his best researchers walked out to found Fairchild. He called it a betrayal, and the name that stuck to them — the traitorous eight — is usually laid at his door, which is how the industry got its founding myth.

Everything after that is a string of events recorded as his long descent into madness. He spent two decades arguing that the wrong people were reproducing and that anyone with an IQ under 100 should be paid a thousand dollars per point below it to be sterilized. He taped his calls with reporters and mailed them the transcripts. He ran for the Senate in 1982 and took 8,308 votes, 0.37 percent, eighth in a field of thirteen. He sued a newspaper for libel, won, and was awarded one dollar. When he died in 1989, his children found out by reading it in the papers.

Things we cover:

• GlobalFoundries’ history in Silicon Photonics

• The shift to 300mm wafers for optical components

• Copper’s limitations in high-speed data centers

• Co-packaged optics (CPO) reliability and power efficiency

• The OCI Multi-Source Agreement

• NRZ modulation for scale-up networks

• Silicon Germanium’s role in high-speed transceivers

This podcast is lightly edited for clarity.

GlobalFoundries’ Photonics History

Austin: Hello everyone. Today we have a special guest, Tom Barber, VP Communications Infrastructure and Data Center at GlobalFoundries. Hey Tom.

Tom: Good morning. How are you?

Austin: Good, good. Thanks for coming. So today, I want to talk about GlobalFoundries and your photonics and optics background and experience as a company. I don’t think most people think of GlobalFoundries when they hear CPO or when they’re thinking about photonics. So I thought you’d be the perfect person to talk to on this topic.

So, I think right away when I heard of GlobalFoundries in this space, I thought, wait, GlobalFoundries does photonics? Most people probably like me know GlobalFoundries as the foundry that was in the running at the leading edge for a while and then stepped back and started focusing really on foundational nodes. But what people like myself don’t know is that you actually do have a background in the business of moving data with light, and you have for well over a decade. I think it traces back to the IBM Microelectronics business. So maybe start very high level for us, like what is GlobalFoundries even doing in photonics? How far back does it go? Just educate us.

Tom: Sure. Yeah, and I think GlobalFoundries’ focus is really on what we call essential silicon, right? And that’s the foundation of all our electronics systems, including data centers, right? It’s power, it’s communications, it’s memory, it’s all the things that are essential to making these communications, these electronic systems work. And Silicon Photonics perfectly aligns with that strategy. It’s very differentiated, it’s very complex technically, and it’s in a very challenging market, right? So there’s great opportunity to differentiate.

For those people that don’t know, GlobalFoundries, we were born out of AMD. We were the AMD foundries that were spun off. But over time, we acquired both Chartered Semiconductor, which had a Silicon Photonics effort, and we acquired IBM Microelectronics, which has a long history in Silicon Photonics. The effort at IBM Microelectronics actually started in the mid-2000s with doing very basic integration of waveguides, modulators, and photodiodes into CMOS technologies.

In the mid-2010s, so after about 10 years of effort, that turned into real products, shipping 25 gig per lane type of products, shipping in mass volume. The volumes were fairly small at the time because it was really only used for long-range point-to-point communication. But we’ve continued to invest and now we’re on our third generation of integrated Silicon Photonics, and that’s really what’s being rolled out in mass scale in the data centers today.

Austin: So interesting. Okay, so the history traces back. You got AMD and acquisitions of Chartered Semi and IBM Microelectronics. That’s super interesting. And yes, it sounds like you’ve been in this long-distance optical communication space. So I did not know that.

Now, what also surprised me is I’d heard recently that GlobalFoundries claims to be the largest pure-play Silicon Photonics foundry by revenue. And again, I think people think of TSMC or they think of Tower Semi. And again, that’s kind of like a shocking fact. So can you maybe tell us a little bit more about like is that true and tell us a little bit more about the business?

Tom: Yeah, so that is true. I think that’s really, we have been working with key customers for a very long time, and growing as the business grows. And that’s been key to us to make sure that we have those strategic customers in place that are the market leaders. The second piece of this is we made a very early investment in moving Silicon Photonics to 300 mm foundries, right? We’ve put it into our facility in Malta, New York.

And that’s been huge for us because it has allowed us to significantly expand our capacity. And that’s what the market is looking for as much as anything right now is they’re everybody’s just desperate for more capacity and we are available to provide that capacity. As a part of that, we added the AMF team in Singapore, which brought in a full range of very highly differentiated products that were actually orthogonal to what GF was doing. GF’s primary focus was on short-range and data center products, where AMF was doing a lot of business in long-range. And so that helped us round out our portfolio and added a complementary set of very high-value products. And the combination of the GF Silicon Photonics business plus the AMF business is what made us number one by revenue.

Austin: Ah, okay, okay. So there was the short-range play and the long-range via the acquisition.

Scaling with 300mm Wafers

Austin: One interesting thing, going back a little bit, you said moving to 300 mm wafers. Can you explain that more? Like was that coming from 200 mm to 300 mm and why is that such a big deal to unlock more capacity?

Tom: Yeah, so yes, most Silicon Photonics today is actually still produced on 200 mm wafers. That’s where most of our competitors are. When you go to a 300 mm wafer, it’s the radius squared, right? So you go up by 50% in radius, you square that, you get 2.25 times as many die per wafer, right? So running the same number of wafers, you get more than twice as many units coming through.

And that’s really important as we scale. Photonics, even going back five years, was a relatively small business, right? For two reasons. One is, there were other alternatives, Indium Phosphide and EML that were very competitive at 50 and 100 gigabits per second. Plus, the overall market was just significantly smaller. The data center piece had not really taken off yet. But with the data center piece taking off and 200 gigabits per second being the node that’s really taking off, that’s the optimal place for Silicon Photonics and that’s why we’ve seen an explosion in Silicon Photonics. So having that extra volume available via 300 mm wafers is really helpful.

The Limits of Copper and the Rise of Optics

Austin: Yes, okay, so let’s talk more about this 200 gigabits per second and sort of the opportunity right now for optics and maybe let’s talk like scale up. So I know, early rack scale AI systems, the switch was at the top of the rack. You had like eight GPUs interconnected in nodes and they were connected to a switch at the top of the rack. But as these racks are getting denser and we move to 200 gigabits per lane speed, now all of a sudden, I think it’s difficult to get the—I know the switch has moved to the middle of the rack because it’s harder to reach from top to bottom. So like unpack the problem that the industry is trying to overcome right now.

Tom: Yeah. So it all comes down to the fundamental limitation of copper, which is range, right? So at 100 gigabits per second, a direct attached copper cable—so no intelligence, just a dumb cable—could span about 2 meters, which is basically the height of a rack, right? So you could go, any connection within a rack, you could do with copper without a problem. When you get to 200 gigabits per second, that range drops to about 1 meter, which is why when you look at like an NVL 72, they move the switches to the middle of the rack because that’s kind of as far as they can go realistically. When you go to 400 gigabits per second, now the range is half a meter and you’re not going to quarter the size of the rack, right? So you have to go to something faster or something, yeah, something with more range, which is optical. That’s really kind of the high-speed stuff. And that’s within a rack.

Now, right now, most of the scale-up networks are within a rack. So an NVL 72 is one rack. The Helios that was just announced by AMD is a single rack. But you really want to go to multiple racks. And when you go to multiple racks, now you’re talking about spanning tens or even hundreds of meters and that’s when you absolutely have to switch to optical. You cannot do that with copper, not at the speeds we want to do.

Austin: Okay, so for scale up, what you’re saying that copper is getting shorter and shorter and so one way to move forward is to just try to move the switches closer and closer to the GPU, but ultimately that’s going to run out of steam. So even within the rack, you might need optics. But then, of course, the question is why stop with one rack? Why not have a scale up domain that could stretch into neighboring racks or four racks side by side? And so, of course, now it’s about like shrinking, but then it’s about expanding as well. And you’re saying that only optics can pull that off.

Tom: Yeah, if you look at what Google has done and even what Huawei has done with their scale-up networks, they’ve gone beyond a single rack. So instead of being limited to, you know, 72 or 144 GPUs, depending on how you count them, they’re doing 300, 500, 1,000 GPUs across, you know, six, eight, 10 racks, right? So they’re really expanding the size of their scale-up network using optical communication to span multiple racks.

Austin: Gotcha. Okay, so then walk me through, are we talking about like pluggables for the optics or NPO or CPO and where does GlobalFoundries come in?

Tom: Right. So, it can be any of those options. What we see is a trend from pluggables first going toward NPO and then toward CPO. And the reason is really cost and power and density. So when you’re at the edge of the rack with a pluggable, you’re looking at about 35 dB of loss from the edge of the rack to the GPU or switch ASIC in the middle of the server, right? That loss has to be compensated for by a, you know, kind of expensive and pretty power-hungry DSP in the pluggable.

When you move to an NPO system, now you’ve dropped your loss from about 35 dB to somewhere between 15 and 20 dB, right? That allows you to significantly reduce the amount of compensation you need to do on the electrical side, or even eliminate it, right? So if you have enough link budget end to end, that you can handle the extra 15 dB of loss on either end due to the transition from the NPO to the core processor, then you can get away with not having a retimer in the NPO, which is what most people are doing. They’re doing what’s called linear. And so that removes that DSP from the system, which saves a lot of costs and it saves a lot of power. But you still have a fairly bulky package for this NPO.

And what you want to do, and you still have a lot of loss in the system, right? There’s still 15 dB of loss that needs to be compensated for. If you continue to co-packaged optics and you move that transition from electrical to optical into the package, now you’ve dropped your loss from 15 dB down to like 6 dB. And that really helps you both from the link budget, obviously, because you’ve gotten yourself an extra 20 dB, but that also allows you to lower the power of your SerDes significantly, right? So what we’re trying to do is we’re trying to minimize the number of picojoules per bit that you need for the communication. So in a pluggable, you’re talking about a fully retimed pluggable is somewhere around 20 to 25 picojoules per bit.

When you go to NPO, you can go to linear and get rid of the DSP, which does a lot. It gets you down to maybe 10 picojoules per bit, but you still have a pretty powerful SerDes to overcome that 15 dB of loss between the co-processor, core processor, and the NPO. When you go onto the package with the GPU or the ASIC, now you’re talking about 3 dB of loss, and now you can go to the lowest power SerDes, which allows you to get down to less than 5 picojoules per bit.

Now, that’s really critical because all of these systems are thermally limited. So every picojoule of power that goes into the communications is one you can’t use for compute. So what you want to do is minimize the amount of power that you use for the communications between the GPUs, so you can run the GPUs as fast as possible.

Austin: Sure. Okay. So, if we orient around power, the goal is to in a given a fixed power budget in this data center, it’s only got 50 megawatts or 100 megawatts, whatever. We want to use as much power as possible for compute and as little as power as possible for communication, sending data around.

CPO Reliability and Cost Advantages

Austin: Now, talk us through again why, kind of zooming back out, you talked about pluggable. Why do they have so much loss in them? You talked about they have a DSP, but like where does the loss come from? Because I think people—it’s not in the optics, right? It’s like the electrical trace.

Tom: Yeah, it is. It’s the electrical traces through the PCBs from the core processor, a couple hundred centimeters to the edge of the server, right? And so those are very thin wires, and when you’re talking about, you know, a 200 gigabit per second PAM4 signal has about 55 gigahertz of bandwidth, right? So you’re trying to run a 55 gigahertz signal through a very long trace on a PCB, and you end up with a lot of loss.

Austin: So then a step in the right direction, NPO, near pluggable optics, you’re ultimately shortening that trace and then finally co-packaged optics, maybe you’re getting rid of it entirely. But can you walk us, can you walk us through the trade-offs of, you know, why doesn’t—why doesn’t—I know people are talking about using NPO as a stepping stone to CPO. So can you talk us through like, why not just jump to CPO if it’s the most power efficient?

Tom: Right. So the concern with moving away from pluggables is the reliability. Right? So right now, optical communications in general is seen as a reliability risk. And so the data center customers are very comfortable with it being pluggables because if something goes wrong, they just swap the pluggable, right? Just take one out, put a new one in and move on.

They don’t always do root cause to ensure that the pluggable is really the problem, but if you swap out the pluggable and the problem goes away, then you’re fine, you keep going. Moving to near packaged optics is a half step in the right direction. Those solutions will probably be socketed, so they’ll still be relatively easy to maintain. You still have to open, you’ll have to open the server and swap it out physically, but it’s still something that can be swapped in place without completely replacing the GPU.

When you go to co-packaged optics, now you’re talking about something that is permanently attached inside the package of the GPU. So the reliability has to be extremely high. So data center customers, Meta in particular, are going through the effort to validate the reliability of those solutions right now. And Meta has released a couple versions of a study that they’ve had running for a long time with, you know, 50,000, I think it is, GPUs in a network using co-packaged optics. And what they found is the reliability is actually higher than it is with pluggables, and they found no link flap, which is the primary cause of concern in optical communications across their entire testing range, which I think is up to 50 million hours or something like that right now. So, you know, they’re doing the work and becoming more comfortable with the reliability, but they’re not going to deploy it at scale until they’re absolutely certain that it’s a reliable solution.

Austin: Fascinating. So tell us why—why do—why are people expecting that the reliability is not great for CPO and then finding out from Meta like, oh, actually it’s not as bad as you think. I mean, is this about like is the laser—is it an external laser and the concern was that the laser is sitting near a hot chip, but that’s not a problem or what is the problem that people think should be happening and it maybe it’s overblown?

Tom: I think it’s problems that are actually happening today because, you know, and again, there’s not great, actually done some good work on this and root cause, but, you know, the things that end up causing problems in optics, some of them are actually due to the fact that it’s pluggable, right? Because you’re plugging it in, there’s the opportunity for dust to get in the connector and block the optical signal, right? So when you’re swapping out a pluggable, if dust gets in there, all of a sudden you have a reliability issue, right? And it’s attributed to the pluggable, but it’s not the inside case of the pluggable that’s the problem really, it’s the fact that the pluggable, you know, there’s something interfering between the pluggable and the connector.

So, when you go to CPO and you have a fully integrated solution, you know, that’s done in a clean room facility, right? There’s no dust there, right? When you have things that are permanently attached or semi-permanently attached, you know, you’re not dealing with these connection issues that you get where reliability concerns appear. So, that’s what the hyperscalers are really trying to become more comfortable with is not that CPO will be as reliable as pluggables. That’s not good enough. CPO has to be way more reliable than pluggables. So, I don’t think anybody questions that CPO is as good as pluggables. The question is, is it so much better than pluggables that it can be made a permanent part of the system?

Austin: Gotcha. Sure, fascinating. So it’s almost how surprising if the idea was like, oh yeah, pluggable is like the release valve where if there’s a problem, you can unplug it and put something else in, but actually what if the problem is the pluggable, the act of plugging it in itself? It’s kind of funny. So yes, if you can make something co-packaged in a clean room facility, maybe dust never gets in and you actually don’t see those issues. That’s really fascinating.

So then, what about like cost? I mean, everything has a trade-off. So if CPO potentially has great reliability and it’s much lower from an energy cost, what about like dollars and cents? Is it more complicated? Is it expensive or does it is it all a wash compared to like linear or traditional pluggables?

Tom: Yeah, and again, it comes down to if you look at a pluggable, you strip away a lot of the components of the pluggable when you go to co-packaged optics, right? You obviously don’t need the case anymore, right? That disappears immediately. There’s a lot of support circuitry on there, some MCUs, some power, and in particular, especially the DSP that goes away, right? So the DSP is probably the biggest component that goes away from a cost standpoint. So that saves you a lot of costs, and then you get into the operating costs and when you have significantly lower power, that obviously translates directly to operating costs.

OCI MSA and the Shift to NRZ

Austin: Interesting. Okay, so, let’s move on a little bit. So I saw some news about the OCI MSA, like a multi-source agreement for optical interconnects. So can you enlighten us like what is an MSA? What is this and why does the industry write one? I think some of the names involved AMD, Broadcom, Nvidia.

Tom: Yeah. So an MSA is a multi-source agreement. And what it is effectively is the industry looking at a standard, typically a standard from the IEEE and saying, okay, this is great, but there’s a lot in here that maybe is options and what we’re going to do is we’re all going to agree on, here’s the options we’re going to do, here’s the options we’re not going to do, here’s how we’re going to test things, here’s how we’re going to make sure it’s interoperable. So that is what an MSA is. The one that’s—it’s not called an MSA, but honestly, the most famous MSA is the Wi-Fi Alliance. So the Wi-Fi Alliance takes the Wi-Fi spec from IEEE and turns it into something that can be productized, right?

The optical industry has typically had MSAs focused primarily around mechanical. So if you look at the, you know, there’s one for it’s called OFSP. That’s the form factor for the pluggable. So it defines the mechanical electrical interfaces so that when you plug these things in, they all work, right? The electrical interface is defined by OIF, and the optical interface is defined by IEEE, but the MSA kind of brings all those things together and says, okay, here’s how we’re going to combine these pieces and wrap them up mechanically such that we have an interoperable pluggable.

The OCI MSA is a little bit different in that it’s actually taking and defining the optical interface, right? So that for most the optical communication used in data centers is defined by IEEE, IEEE 803 802.3. That is not sufficient for what we want to do for scale-up compute, right? And OCI is really focused on scale-up compute. And so when you look at the participants, the founders of OCI, they are the key suppliers in the data center industry. They know absolutely what is the best solution for scale-up networking, right? And so they’ve come together and said, hey, listen, the specs, the optical specs that the IEEE is defining are not really fit for purpose for the scale-up application. This is what we believe is fit for purpose for the scale-up application. This is how we think you should do things.

And it’s really focused around maybe not going as far range-wise, because, you know, two kilometers maybe is a little too far for a scale-up network. So we’re going to back off on that a little bit, and we’re going to go to a wide slow solution. And what that is is, you know, to go as fast as possible with as much data as possible over a single fiber, IEEE has moved to multi-level modulation. So it’s called PAM4, and, you know, you transmit two bits per symbol and you have four levels. And the issue is those levels are pretty close together, so you have to either have a lot of power or very low noise to receive them properly.

What they’ve done with OCI, they’ve gone back and said, we’re going to go back to a binary system, so only one bit per symbol, and we’re going to slow it down to 50 gigahertz. But we’re going to do four wavelengths per fiber. So we’re going to take advantage of the fact that you can put multiple channels on a single fiber to still have that 200 gigabits per second of bandwidth. We’re just going to do it with four wavelengths. And what that does is it makes the receiver a lot less complex. So the amount of channel equalization you need goes down quite a bit, and the amount of forward error correction you need goes down by quite a bit. The native bit error rate for NRZ 50 gigahertz is about a million times less than what it is for PAM4.

Austin: Oh, wow.

Tom: So it’s significantly easier to receive an NRZ signal. And that translates into reduced costs and it translates into reduced power.

Austin: Oh, fascinating. Okay, so the industry is coming together saying we’re going to make an interoperable standard. And presumably that’s just so that there can be competition so that everyone can say, hey, we’re building to this spec collectively. And then what I heard you say, which is fascinating is it sounds like the industry is aligning around not just trying to continue to increase the per lane speed and double it, double it again, but actually to walk back a little bit instead of PAM4, go back to NRZ and say, hey, let’s go back to 50 gigabits per second NRZ, but can we send four like wavelengths down the same fiber, kind of four colors if you will. And those are being sent simultaneously?

Tom: Correct. Yes.

Austin: Interesting. So if there’s more if there’s different wavelengths being sent simultaneously, is that like a boon for like people that make the lasers? Do you need more lasers to do that?

Tom: So, just back up one second. Just to explain something about the difference between the scale-up application and the scale-out application. So the scale-up application, what you’re trying to do is you’re trying to connect as many GPUs as you can using a single hop network, right? And so if you look at the maximum size switch you get today is 100 terabits per second. And so with 200 gigabits per second per fiber, you can connect 512 GPUs to each switch, right? And then what you do is you stack up switches to give you the most bandwidth. So if you look at the NVL 72 system, they have 18 switches in parallel, which allows them to get to that 7.2 terabits per second bandwidth they have per GPU. But each fiber is only, or in this case, they use copper. Each copper pair is only 200 gigabits per second. It’s just shared over 18 switches.

The other thing that the OCI team has done really well is, so when you look at the amount of lasers you need, it’s not as simple as one laser per wavelength, because the laser power can actually be split and used by multiple fibers, right? So if I have a transceiver that’s got eight fibers connected to it, I typically right now the ratio is four to one, so I’d have two lasers to drive those eight fibers. But for pluggables, it’s actually moving to eight to one, so you’d only have one laser driving all eight of those fibers. With the OCI spec, they back that off even further to you can get to as extreme as 32 fibers per laser. So one laser could drive 32 fibers. So you could get a full optical engine solution with the eight wavelengths of light that’s needed for OCI with just eight lasers.

Austin: Gotcha. Okay. And then you were saying that we don’t need to think about like one laser per port or anything like that. In fact, the laser, the light can drive many different fibers, maybe as up to as many as 32.

Tom: Correct. In like the most extreme case.

GlobalFoundries’ OCI-Capable Scale Platform

Austin: That’s pretty cool. Okay. So now tell about where does GlobalFoundries come in here? I know you guys announced Scale and you called it the first OCI capable platform. So talking back to that MSA, can you explain a little bit more about Scale and, you know, how you’re the first OCI capable platform?

Tom: Sure. So what we’re doing with Scale is we’re putting together everything you need to do the electrical to optical translation in a known good form factor, right? And call it a chiplet, call it a module, whatever, right? And so what that includes is it includes an electronic IC, which is going to be used to communicate to the CPU or the GPU or the AI ASIC. And then that electronic IC sits on top of a photonic IC, which does the translation between electronic and photonic signals. That photonic IC has a detachable connector on there. And that detachable connector is key because when you’re assembling a CPU, what you don’t want to have to do is have a fiber dongle hanging off your photonic IC at all times. You want to create, you know, you want to build your server using rectangles, right? And then plug everything in at the end. And so with that detachable fiber connector, it looks very much like copper where you build all your PCBs, put them all together, and then you have a wiring harness, in this case, an optical wiring harness instead of electrical wiring harness, that you connect at the end that bridges from those CPU modules connected to the GPU to the edge of the server.

Austin: And GlobalFoundries, you can fabricate which of those pieces do you guys fabricate and assemble?

Tom: Yeah. So we have the ability to manufacture all of it. The photonic IC for sure, we do 100% of the manufacturing. We have a number of different design partners working with us on photonic IC designs. The electronic IC, it really depends on the complexity of the design, particularly the digital. So if it’s a less complex design, we can use our FinFET process or one of our FDX processes. If it’s a simple, you know, linear translation, we could actually use our Silicon Germanium process even. If it’s a more complex digital translation and a customer wants to use an advanced node, like a three nanometer or two nanometer node, then they’re free to do that and we’ll bring that wafer in and do the assembly and test. The micro optics, again, are manufactured externally, but we do the assembly and test.

Micro Mirror Technology and O-Band

Austin: Okay, fascinating. So then talk to us more about like position yourself against what some other people are doing. Like I know TSMC is in this space with CoWoS and they use a grating coupler and I think GlobalFoundries uses a different technology, an edge coupler. And could you maybe explain a little bit more about the technology differentiation that and the approach you’re taking?

Tom: Right. So we do, so, yes, the mechanism for the light getting into the waveguides is very similar to edge coupling, but we use, we don’t do it at the edge of the die. We actually have a micro mirror that we implant into the wafer, so the light can still come in vertically, right? So the light comes in vertically exactly the same as you would with a grating coupler. We just have a mirror and that reflects the light horizontally into the waveguides on the photonic IC. The reason we went with that approach instead of grating couplers is because grating couplers inherently have limited bandwidth. And so you can’t service the entire O band with a single solution. With a micro mirror, we can do the entire O band, which gives us the maximum flexibility as far as doing the wavelength planning, right? So, OCI today is four wavelengths in each direction. You know, one of the ways we’re going to scale that to do higher bandwidth is to add more wavelengths. And so as we’re thinking about how do we evolve into the future, we wanted to make sure that we made the entire O band available to use for as many wavelengths as possible.

Austin: Ah, fascinating. Oh, and for listeners who might not know, can you define like what does O band mean?

Tom: Oh, yeah. So the O band is it, you know, you think about AM FM bands for your radio. So O band is an optical band. It’s around 1310 nanometers, which I can’t divide by the speed of light in my head to figure out how many gigahertz that is, but or terahertz is, but it’s really, really fast.

Austin: Gotcha. Okay, thanks. That’s helpful.

Market Validation and Silicon Germanium’s Role

Austin: All right, so then, okay, so you guys are taking a different approach and you think, you know, it keeps the whole O band on the table, which will be helpful in the future as you’re trying to increase bandwidth, it will keep more wavelengths sort of at your disposal. At the end of the day, you know, I see people online and they’ll say, you know, oh, this one company’s better than the other, but it feels like a little bit sort of like armchair quarterbacking. Like, how, like, can you help us understand, as people interested in the space, like, how, how do we know as a non-engineer, non-silicon photonics engineer, how do we know how good, you know, GlobalFoundries components are? Is there like a good proxy or a good way to understand it? Is it just like checking the customers or what do you think?

Tom: Yeah, I mean, that’s the, you know, the market doesn’t lie, right? So the market will choose the best solution, right? And so that’s, you know, we’re at the very beginning of this market. And like I say, right now, you know, TSMC, other founders, they’re not the enemy to me, right? The enemy to me right now is copper. I’m trying to beat copper, right? If TSMC wins and we win, that’s great because we’re both displacing copper. And until all the copper is gone, there’s plenty of market to go around.

So, you know, I think the other thing that’s important to understand is that there’s two different types of components that are needed for these optical engines. One is the photonic IC, which is what we’ve been talking about, which is the silicon photonics piece. The other piece is the electrical ICs that are needed to drive the photonic IC. And those are typically high-speed analog components. And there’s two types of components. One is the driver, which is a modulator driver, so it amplifies the signal coming out of the DSP such that you can drive the modulator that’s the silicon photonics modulator on the pick. That to some degree is being integrated into the DSP, so the market’s shrinking a little bit on that.

The other one is a transimpedance amplifier. So that takes the current out of the photodiode, which detects the incoming light and translates it into a voltage, which is then converted and processed on the DSP. The bandwidth of those is similar to what I talked about earlier with the PCB. You know, for a 200 gigabit per second PAM4 signal, you’re talking about 55 GHz of bandwidth if you’ve got a retime system and closer to 70 GHz of bandwidth if you’re trying to do a linear system.

Typically for an amplifier, you need about the transistor speed needs to be 5X what your bandwidth is. So now you’re talking about transistors that need to run 350, 400 GHz to do the 200 gig per lane. When we talk about 400 gig per lane, now you’re talking about doubling that, right? So you’re talking about transistors that are 600, 700 GHz. Very, very few companies can do that at scale and reliably. And Silicon Germanium from GF is one of those few technologies, right? So we have, you know, very, very good Silicon Germanium technology. Our transistor speeds are extremely high, much higher, you know, higher actually than what you need for 200 gig per lane. And we have new generations, you know, roadmaps that support 400 gig per lane very quickly. So, you know, we’ve been fortunate that we’ve gotten a lot of adoption on 400 gig per lane. So as you see the 1.6T transceivers volume increasing, you know, we’re getting a disproportionate share of that right now.

Austin: Okay, interesting. So Silicon Germanium is about transistor switching speed. And as we see switching speeds, or bandwidths of like 200 gig, 400 gig, it means we should think Silicon Germanium and we should think GlobalFoundries.

Tom: Yes.

Austin: Fascinating. Awesome. All right, Tom, we’ve covered a ton of ground. It was pretty technical, but I appreciate you walking us through and teaching us and enlightening us also about GlobalFoundries, from a business perspective. So thanks so much for your time.

Tom: Thank you, Austin. It was great talking to you. I appreciate the time.

AMD is acquiring Toronto-based AI inference chip startup Taalas, a deal that brings back co-founder Ljubisa Bajic, a former AMD executive and ex-Tenstorrent CEO, to fold purpose-built inference silicon back into AMD. SK Hynix is committing 54 trillion won across two South Korean fabs, while SpaceX and Tesla are putting up $16.8 billion for the Terafab chip plant in Texas.

Let’s get into it. — Austin & Vik

Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!

AMD to Buy Taalas

AMD has agreed to acquire Taalas, a Toronto-based AI inference chip startup, in a move that extends the chipmaker’s push into purpose-built silicon for running AI models. Taalas was co-founded by Ljubisa Bajic, a former AMD executive who also served as CEO of Tenstorrent, and the Taalas team will join AMD under Vamsi Boppana’s AI group. The company’s focus is chips designed to accelerate individual AI models rather than serve as general-purpose accelerators, a distinction AMD is now actively building toward, according to ServeTheHome.

The acquisition comes weeks after AMD’s Cerebras-adjacent moves and lands shortly after a strong financial quarter. Bajic’s background straddles both AMD’s own history and the broader AI chip startup world, which makes the hire as notable as the deal itself. Bloomberg and Reuters both reported the acquisition; financial terms were not disclosed.

Vik: There is an emerging trend of hardcoding AI models into silicon, which is the approach that Taalas pitches. Interestingly, Google is also developing an experimental custom chip called Frozen V2 that is designed to embed parts of Gemini directly into silicon. It is aimed for a 2028 rollout with 6 to 10x better power efficiency than TPUs.

SK Hynix Commits 54 Trillion Won Across Two Fabs for AI Memory

SK Hynix announced it will invest 54 trillion won across two South Korean fabrication facilities, splitting the commitment between 35.2 trillion won for the Yongin “Y2” fab and 19.1 trillion won for the Cheongju “M17” facility. The company framed the decision as a move to “seize opportunities in line with the market’s growth speed” and to support stability in the global AI semiconductor supply chain. M17’s cleanroom is scheduled to open in December 2028, with Y2 following in June 2029, meaning the capacity additions are timed well into the next decade. Both sites will expand production of DRAM and NAND, with output calibrated to customer demand rather than speculative builds.

The dual-fab commitment stands as the largest single memory CapEx announcement of the current cycle.

Vik: SK hynix’s fab expansions are a high-stakes bet on sustained AI memory growth. For this kind of capacity expansion to make sense, sustained demand for memory needs to continue through to 2028 or 2029, which is an eternity if you consider the current pace of AI. There is a nonzero possibility that some new memory technique or tier emerges between now and then, rendering this fab capacity or less in-demand than it is today

SpaceX, Tesla and Nvidia Back Captive Chip and Data Center Buildouts

SpaceX and Tesla plan to spend $16.8 billion initially on the Terafab chip plant in Texas, a facility where SpaceX will also build natural gas power plants to supply the site’s energy needs directly. The vertical integration is thorough by design: the same companies consuming the chips are paying to manufacture them, collapsing the distance between silicon and deployment. That logic is finding company in Australia, where data center firm Firmus Technologies has closed a $2 billion fundraising round backed by Nvidia and Coatue, among others.

Firmus nearly doubled its valuation to over $10.5 billion in the Nvidia-backed raise, with Jane Street also joining the investor group. The round gives Nvidia a direct stake in the compute infrastructure running its own chips, a structural position rather than a customer relationship. Firmus is building AI data center capacity in Australia, a market investors are treating as distinct from the crowded North American pipeline. The two deals, separated by an ocean, are drawing from the same logic: own the stack.

Also moving:

• Nscale, a European GPU cloud provider, is targeting a September US IPO and claims $51 billion in contracts, showing independent data center operators are still racing to list before the window narrows.

Optical Component Earnings and Fiber Capacity Bets Show AI Supply Chain Monetizing

Applied Optoelectronics and MACOM both reported second-quarter and fiscal-third-quarter results on August 6, 2026, adding to a growing pile of evidence that AI infrastructure spending has reached the optical supply chain in earnest. MACOM, reporting for the quarter ended July 3, joins AOI in what has become a crowded earnings calendar for photonics-adjacent names.

GlobalFoundries posted revenue of $1.786 billion for its second quarter and used the results to strengthen the commercial rationale for its U.S. government-backed silicon photonics investment.

Taken together, the earnings prints and capital programs trace a supply chain where optical components are now clearly moving from commodity inputs to priced scarcity.

Vik: Investors are rotating out of memory and into optical names. The recent drama with proposed chinese optical transceiver bans has sparked fear into investors as they understood how important optics is for the AI buildout. Expect this growing interest to continue.

Sector Watch

Memory & Storage

• Renesas launches Gen 3 MRDIMM chipset solutions pushing DDR5 performance to 16,000 MT/s for next-generation AI and HPC server platforms. (StorageNewsletter)

• NEO Semiconductor launches NEO.AI memory platform combining new SRAM and DRAM architectures to address capacity bottlenecks in AI processors. (EE News Europe)

Foundry & Packaging

• Wistron is reportedly in line to win an Oracle AI server order, broadening its hyperscaler customer base beyond existing accounts. (digitimes)

• Koh Young expands Korea production capacity to meet accelerating demand from AI server assembly and advanced chip inspection customers. (Chosunbiz)

Power & Energy

• Wolfspeed and LITEON partner to deliver 800 VDC power solutions for hyperscale AI data centers, expanding the 800V DC ecosystem beyond server racks. (Wolfspeed)

• Alphabet returns to the bond market with a jumbo sale drawing $115 billion in investor demand to fund AI infrastructure and CapEx. (Bloomberg.com)

Data Centers

• Microsoft opens its largest India data center hub in Hyderabad as Azure crosses $100B in annualized revenue, with a fourth India cloud region now live. (Reuters)

• UAE sovereign fund is weighing a $6.3 billion investment to build an AI data center campus in Japan, per Bloomberg reporting. (Bloomberg.com)

• IMC selects CoreWeave as its AI cloud infrastructure provider to scale research computing. (CoreWeave)

PCB & Components

• China’s MLCC supply chain is rapidly expanding domestic upstream capacity as global AI hardware demand drives multilayer ceramic capacitor shortages. (SCMP)

• Victory Giant Technology is aggressively expanding PCB manufacturing footprint and international operations to capture surging AI-driven board demand. (SCMP)

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