Hello world, it’s Tuesday, October 13th.
We are at OCP this week, and there is so much excitement in the air. The conference is PACKED, with lines going out the door and into the street. Lots still going on in the world…
ASML unveiled a Hyper NA EUV system targeting 5nm single-exposure patterning ahead of its earnings report this week. Elsewhere, Microsoft’s Maia 300 is headed for multi-gigawatt Azure deployments by 2027, China’s CXMT is claiming a denser 4F² DRAM cell architecture without EUV, and Applied Materials opened its $5 billion EPIC Center in Silicon Valley.
Let’s get into it. — Austin & Vik
Be sure to check out the Semi Doped podcast on YouTube or your favorite podcast player!
Presented by Crusoe
Crusoe builds the full stack for AI, from power and data centers to the cloud. It can also help you tune a small model on your own data for just a few bucks.
For repeatable work like reports, an open model trained on your terminology and formats can match a frontier model, and it’s cheaper and faster to run.
Crusoe’s Serverless Fine-Tuning handles the training: upload your dataset, pick an open model like Llama, DeepSeek, or GLM, and pay per million tokens used, not per GPU hour.
About $2 buys roughly 5M training tokens on smaller models.
Deploy on Crusoe Cloud in one click or download the weights and deploy on your own.
ASML Reveals Hyper NA EUV System Capable of 5nm Single-Exposure Patterning
ASML has unveiled a Hyper NA EUV lithography system targeting 5nm single-exposure patterning, extending the company’s roadmap beyond its current High-NA platform. Single-exposure capability at that resolution removes the need for multi-patterning workarounds that add cost and process complexity at leading-edge nodes. The disclosure sets a technical anchor for sub-2nm scaling across the industry. Timing is deliberate: ASML reports earnings this week, and according to Bloomberg, guidance on capacity buildout has become a central test for investors already nervous about the chip sector’s unsteady rally. The Hyper NA announcement gives ASML something concrete to stand behind when those questions arrive.
Microsoft Maia 300 Multichiplet Chip Targets Gigawatt-Scale Nvidia Displacement
Microsoft has unveiled the Maia 300, a multichiplet inference accelerator it plans to deploy at multi-gigawatt scale across Azure data centers by 2027, with cost reduction cited as the explicit mandate behind the program. The chip uses a multichiplet architecture, a departure from the monolithic die approach that has defined GPU design, and targets roughly 40% more tokens per second than its predecessor. Reuters reported the rollout is framed internally as a structural move to reduce dependence on outside semiconductor suppliers, Nvidia chief among them. Microsoft expects to stock multiple gigawatts worth of Maia 300 capacity, a deployment scale that would represent one of the largest commitments to proprietary inference silicon any hyperscaler has announced. Axios noted that the announcement effectively makes every major Nvidia customer a potential competitor, as hyperscalers now have a concrete reference point for vertical silicon integration at cloud scale.
Vik: Whoever wins the compute race, SK Hynix already locked the memory on the whole Maia fleet back at Maia 200. The memory trade doesn’t care which ASIC wins. And 7x rack throughput over Maia 200 on N2P is a real jump.
Austin: Multi-GW sounds like a lot until you put it next to the 38 GW Microsoft is targeting by 2032. There’s plenty of room for both Maia and Nvidia in that.
CXMT Claims Denser DRAM Cell Architecture, Rattling Samsung and SK Hynix
China’s largest memory maker CXMT says it has shifted to a 4F² cell architecture for DRAM, a denser layout it adopted specifically because EUV lithography remains out of reach, according to reporting by Bloomberg. The design reportedly lets CXMT pack more cells per wafer without EUV, and the company is targeting server DDR5 as its next commercial milestone, putting it on a collision course with Samsung and SK Hynix in one of memory’s highest-margin segments. Shares of both Korean chipmakers fell on the news, Seoul Economic Daily reported, while Micron also dropped. CXMT is funding the push partly through a large domestic IPO and captive Chinese demand, with economy.ac noting that leaked Korean process knowledge has accelerated the timeline. Wall Street is divided on how deep the threat runs, with some analysts treating the selloff as overdone.
Austin: Announced, not shipping. But with Samsung reportedly ~80% sold out for 2027, does CXMT even need great yields to find server DDR5 buyers in China?
OCP Summit Brings Vera Rubin Specs and AMD Helion Racks Into the Open
At the OCP Global Summit in San Jose, Nvidia opened its Vera Rubin architecture to the broader ecosystem, publishing specifications intended to help partners build interoperable AI factory infrastructure at gigawatt scale. AMD simultaneously debuted Helion at full rack scale, targeting agentic AI workloads. ODM partners moved fast: Wiwynn arrived on the show floor with physical Vera Rubin NVL72 and AMD Helion rack systems already built. Cisco and Nvidia jointly introduced a new pluggable optics form factor, with Cisco President Jeetu Patel arguing that AI agents will consume far more network bandwidth than humans running equivalent tasks. Meta disclosed IcePack liquid-cooled network racks, the 102.4T IceCube switch platform, and the MetaRoCE open-source transport protocol, while also launching the Open Switch Platform Architecture initiative inside OCP.
Vik: The new pluggable form factor from Nvidia + Cisco is interesting: USFP. Here is a comparison to XPO I posted on X.
Applied Materials Opens $5 Billion EPIC Center to Speed AI-Era Chip Development
Applied Materials has unveiled its Equipment and Process Innovation and Commercialization Center in Silicon Valley, a $5 billion capital commitment the company describes as its largest ever. The facility is billed as the world’s largest dedicated to collaborative semiconductor process technology and manufacturing equipment R&D, designed to seat chipmakers, systems companies, equipment partners, and university researchers alongside Applied’s own engineers. CEO Gary Dickerson frames the initiative as a direct response to AI driving demand for faster innovation cycles, where speed now rivals raw technological capability. Bloomberg reports that Applied targets doubling sales without a proportional increase in headcount, treating the EPIC Center as the infrastructure that makes that ratio plausible as AI-driven wafer demand climbs.
Credo Launches 1.6T ZeroFlap Cable and SRMO Optical Standard for AI Racks
Credo Technology has simultaneously released its 1.6T ZeroFlap Active Light Cable and initiated a Short-Reach Micro-Emitter Optics standardization workstream under the Open Compute Project, with ams OSRAM, Lumentum, Corning, and Astera Labs joining as founding contributors. The ZeroFlap cable is billed as the industry’s first row-scale, wide-parallel optical interconnect, targeting AI data center scale-up and scale-out applications, with customer shipments expected in 2027. The SRMO initiative aims to define a common specification for micro-emitter-based optical links inside AI racks, covering both intra-rack and rack-to-rack distances. Lumentum, Corning, and Astera Labs are separately planning a live demonstration of 1060 nm VCSEL-based PCIe-over-optics at the 2026 OCP Global Summit, a data point that puts the supplier ecosystem’s hardware commitments on a visible timeline.
Vik: Micro-emitters are the wide-but-slow play - lots of emitters in parallel at modest speeds instead of flogging a few channels. This is exactly the mid reach gap I flagged for active copper, now going optical, with 50m reach closing the copper to pluggable hole. SRMO as an OCP standard means Credo wants an ecosystem, not a one off cable.
Austin: Fast. Credo only closed the Hyperlume (microLED) acquisition a year ago, but seem to have pivoted to microVCSELs. MicroLEDs are falling behind.
Sector Watch
Compute & Edge
d-Matrix announces Squadron multi-rack AI inference clusters at data-center scale, days after reports Nvidia is set to invest in the startup at a $5 billion valuation. (PR Newswire)
Marvell unveils second-generation Structera X CXL 3.2 memory expanders — the industry’s first six-channel design — targeting AI inference memory bandwidth bottlenecks. (Marvell)
Intel officially names its Crescent Island data-center AI inference GPU the GPU D-Series, releasing full performance specifications ahead of launch. (ServeTheHome)
Memory & Storage
SK Hynix discloses the H-TPU controller architecture featuring over 100 small processors, targeting in-memory transaction processing for AI workloads. (The Elec)
Kioxia launches the CM9-DLC enterprise SSD with direct liquid cooling support, targeting AI data-center thermal demands in dual-port E3.S form factor up to 30.72 TB. (TechPowerUp)
Reuters reports global smartphone shipments recorded their worst third quarter in 14 years, with a memory shortage cited as a primary constraint on device supply. (Reuters)
Foundry & Packaging
Hua Hong deepens partnerships with domestic Chinese equipment suppliers and sets a target to strengthen its specialty foundry market share by 2030. (digitimes)
ERS electronic launches a fully automated panel-level packaging system for 310×310 mm substrates, integrating temporary bonding and debonding in one platform. (Semiconductor Digest)
Power
Bloom Energy / LS Electric — LS Electric wins a $138 million order from Bloom Energy for U.S. data-center power systems, pushing cumulative LS Electric orders from Bloom above $500 million; LS Materials adds a separate $51.5 million ultracapacitor order from the same program. (Bloom Energy)
Wolfspeed receives a conditional commitment for up to $1.5 billion in U.S. Department of War loan funding to bolster domestic wide-bandgap semiconductor supply chain. (Charged EVs)
Infineon introduces the XDP8HD40S-1 high-voltage hot-swap controller extending its power portfolio from grid to core for 800 VDC AI server architectures. (Infineon)
Optics & Networking
Celestica introduces the DS6005 data-center switch with co-packaged optics, targeting power-efficient AI fabric interconnects at hyperscale. (GlobeNewswire)
Qualcomm unveils four AI broadband Dragonwing platforms at Network X 2026, while gFiber, Gemtek, and Qualcomm jointly debut an AI-native Wi-Fi 8 broadband gateway. (Light Reading)
Global Technology and ADST partner to localize UV light sources used in co-packaged optics alignment equipment, reducing Korean CPO supply-chain dependency. (The Elec)
PCB & Components
Murata is weighing additional investment to expand MLCC production capacity as AI server demand for multilayer ceramic capacitors continues to outpace supply. (Bloomberg Tech)
HanWool Semiconductor wins a contract from a Japanese MLCC maker to supply upgraded inspection equipment, the company’s latest design-win in passive-component quality control. (The Elec)
Intekplus signs a 30.9 billion won contract to supply semiconductor substrate inspection equipment, its largest single order on record. (The Elec)
Policy & Trade
nLIGHT will report its Q3 2026 financial results on November 5th. (nLIGHT)
Tower Semiconductor will release its Q3 2026 earnings on November 2, 2026, followed by a conference call for investors and analysts. (Tower Semiconductor)
Nokia signs a definitive agreement to sell its Enterprise Campus Edge business to AURELIUS, sharpening its strategic focus on AI-RAN and core network infrastructure.
Tell us how to make Semi Doped better! Give us your feedback! ❤️Story 1



