Hello world, it’s Tuesday, October 27th.
SpaceX locked in a $40 billion GPU master lease with Apollo to fund xAI’s data centers, and Broadcom lined up a $63 billion facility to finance Anthropic’s chips, two deals that treat AI compute as bankable collateral. Elsewhere, TSMC is preparing CoWoS price increases of up to 20%, Anthropic’s S-1 names TSMC disruptions and HBM supply as existential risks, and Applied Materials is lifting its Besi stake to about 20%.
Let’s get into it. — Austin & Vik
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Apollo and Broadcom Structured Deals Mint AI Compute as Bankable Collateral
SpaceX struck a $40 billion GPU master lease with Apollo to fund chip procurement for xAI’s data centers, with Pimco alone absorbing $4 billion of the debt package. The structure treats GPU fleets as leaseable, depreciable collateral rather than sunk capital expenditure. That framing opened a door. Within the same week, Broadcom arranged a $63 billion syndicated facility backed by Wall Street banks and Blackstone to finance Anthropic’s chip purchases, making it the larger of the two deals by a wide margin. BlackRock’s Rick Rieder reportedly spent the weekend working through AI debt transactions as the two mega-financings landed back to back. Pensions and insurers, drawn by the asset-backed structure, are now positioned alongside traditional credit investors across both facilities.
Vik: Ok, here is what this really means. These deals let the biggest AI players finance GPUs like real assets, so they can scale compute much faster without burning their own cash. That pulls more institutional money into the buildout, but it also means pensions and insurers are now exposed if the chips lose value or demand slows.
Austin: GPU-backed debt isn’t new, CoreWeave borrowed $2.3B against H100s from Magnetar and Blackstone back in 2023. The new part is Hock being on the hook. Broadcom is reportedly providing residual value support to the lenders, so if those TPUs lose value faster than the lease pays down, Broadcom eats the loss before the banks do.
TSMC Prepares CoWoS Advanced-Packaging Price Increases of Up to 20%
TSMC is preparing to raise prices on its CoWoS advanced-packaging services by as much as 20%, according Trendforce, in a move that would directly reprice the cost basis of AI accelerators built by Nvidia, AMD, and hyperscaler custom-silicon teams. CoWoS, the interposer-based packaging technology that stacks high-bandwidth memory alongside compute dies, has become a genuine production bottleneck as AI chip demand outpaces available capacity. The scale of the increase isn’t trivial; a 20% rise on packaging alone forces customers to choose between absorbing the hit or pushing costs further down the chain. Anthropic’s IPO filing lists TSMC concentration as a material compute risk, a disclosure that lands with fresh weight given the timing.
Vik: TSMC raising CoWoS prices means the scarce packaging step gets more expensive, so AI accelerators cost more for Nvidia, AMD, and custom-chip makers. If there is no competition from EMIB-T due to low yields or whatever, TSMC can do whatever they want with pricing.
Austin: This is good news for EMIB and Intel. Stay tuned for our pod this week.
Applied Materials Lifts Besi Stake to 20% Amid Hybrid-Bonding Surge
Applied Materials is raising its equity stake in BE Semiconductor Industries to approximately 20%, deepening a strategic partnership built around hybrid-bonding technology central to AI chip packaging. The two companies first linked up in 2023, when Applied took an initial position in the Dutch die-attach equipment maker. Hybrid bonding, which connects chips face-to-face at the wafer level without traditional solder bumps, has moved rapidly from advanced-packaging experiments at a handful of leading-edge fabs into volume production schedules across the industry. Besi holds a commanding share of the hybrid-bonding equipment market, and Applied brings the deposition and surface-preparation tools that must work in sequence with Besi’s bonders. The equity increase reflects that operational interdependence at a financial level.
Vik: There has been a lot of negative sentiment against BESI and hybrid bonding. Recent news has put stack heights of HBM at 12-hi again. NVIDIA is reportedly slowing pin speeds. Directionally, always need more memory capacity. I do feel we will actually go to 16-hi HBM or more with hybrid bonding eventually.
Infineon Commits €1.1 Billion to Villach 300mm GaN Factory
Infineon will invest €1.1 billion in its Villach, Austria facility to build Europe’s first 300mm GaN production line, targeting power conversion demand from AI data centers and renewable energy systems. The Villach site already manufactures silicon power chips at scale, and the GaN expansion extends that footprint into a process node no European rival currently operates at volume. Infineon is simultaneously shipping the world’s first 900V GaN bidirectional switch, a device that clears voltage thresholds relevant to both grid-tied solar inverters and high-density server power supplies. Enphase has awarded Infineon a design win based on that part, adding a named customer to what had been a product without a public production home.
Vik: Nice - GaN pushing into 900V, which is SiC’s turf. A monolithic bidirectional switch collapses two devices into one, so fewer stages in the solid state transformer. But it only cleared testing - series qualification is next, and 650V is the only part actually in the field today.
Cadence Beats Q3 Estimates, Ships Maestro Agentic AI Design Agents
Cadence Design Systems beat third-quarter EPS by seven cents and raised its full-year revenue outlook, citing accelerating demand from chipmakers integrating AI into design workflows. The earnings momentum arrived alongside a product announcement: Maestro, a portfolio of domain-specialized AI models built to power autonomous “super agents” across semiconductor and system design, using reinforcement learning loops wired directly into Cadence’s existing EDA and SDA tools. Q4 early access is planned, with Maestro running on-premises inside customer facilities rather than through a third-party cloud. Digitimes notes that Synopsys has taken a different route, partnering with OpenAI, while Cadence is betting on proprietary, domain-trained models purpose-built for chip engineering tasks.
Vik: AI enabled EDA opens up doors to so many companies to make chips themselves, and faster too. A lot of digital design works with code, and is a verifiable domain for AI. I would say analog, power, and RF still have a lot of tacit knowledge driving chip design, and are not as easily replaceable yet.
Azure Clears Seagate HAMR-SMR Drives With Broadcom HBAs for Cloud Deployment
Microsoft Azure has formally qualified Seagate’s HAMR-SMR drives alongside Broadcom host bus adapters, a combined hardware validation that Seagate says removes the last major compatibility hurdle standing between heat-assisted magnetic recording and hyperscale production deployment. HAMR pushes recording density beyond what conventional PMR technology can sustain, and pairing it with SMR further compresses the cost-per-terabyte equation that cloud operators running exabyte-scale AI storage tiers care most about. The Azure qualification covers Seagate’s highest-capacity drives working in tandem with Broadcom HBAs, giving cloud builders a tested, vendor-backed bill of materials rather than a patchwork of individually vetted components. Seagate’s own announcement frames the validation as specifically designed to simplify scaling for AI and cloud infrastructure, where unqualified component combinations have historically slowed adoption of new drive generations despite strong paper specifications.
Vik: Azure qualifying Seagate’s HAMR-SMR drives with Broadcom HBAs clears a key compatibility hurdle, so cloud operators can more easily scale ultra-high-capacity hard drives for AI storage without custom integration risks. It pushes denser, cheaper terabytes into hyperscale deployments while keeping power and cost roughly the same, which helps the overall AI infrastructure stack handle exploding data volumes more efficiently.
Sector Watch
Foundry & Packaging
LB Semicon will expand packaging capacity under a 10-year supply agreement with Qualcomm, locking in a decade-long substrate relationship. (THE ELEC, Korea Electronics Industry Media)
TetraMem tapes out a new 12nm analog in-memory AI SoC, advancing its compute-in-memory architecture toward commercial deployment. (Business Wire)
Compute
Nvidia and Meta deepen AI collaboration with a $3 billion investment deal spanning the Muse family of generative AI models. (Nvidia News)
Intel agrees to acquire Israeli quantum software specialist Classiq to build a full-stack quantum computing platform. (EE News Europe)
MediaTek expands its roadmap beyond smartphones into AI infrastructure compute, signaling a strategic push up the data-center value chain. (Jon Peddie)
Memory
CXMT declines to supply Apple with memory chips at discounted pricing, asserting pricing discipline as it scales domestic DRAM output. (UA.NEWS)
Rambus posts record Q3 revenue of $218.3 million, beats EPS estimates, and guides Q4 to $227-233 million on continued memory interface demand. (TOKENPOST)
Kioxia pursues a bespoke NAND strategy and secures a credit upgrade as the memory industry faces an AI-spending stress test this earnings season. (Kioxia)
Power
Bloom Energy reports Q3 revenue surging 138% year-on-year, driven by accelerating data-center fuel-cell deployments, prompting bullish analyst target increases. (Mercomindia.com)
Schneider Electric agrees to acquire industrial-software firm PTC for $22.6 billion, extending its footprint from power hardware into digital factory software. (theaisoftwarereport.com)
Optics & Networking
CoreWeave launches the first purpose-built global AI network backbone, adding points of presence across the Middle East and Asia Pacific in Q4 2026. (CoreWeave)
Verizon lifts annual forecasts and signs a $2 billion-plus AI infrastructure deal with AWS, marking one of the largest carrier-cloud compute agreements disclosed this cycle. (Reuters)
iPronics appoints co-founder Dr. Daniel Pérez-López as CEO to accelerate commercial scale-up of its AI optical circuit-switching platform. (GlobeNewswire)
Edge
Schneider Electric, Nvidia, and HPE jointly introduce edge AI agents for industrial monitoring, cybersecurity, and energy optimisation at factory sites. (Fierce Network)
Volkswagen Group expands its partnership with NXP Semiconductors, selecting NXP S32K5 microcontrollers as a core component for next-generation vehicle platforms. (EE News Europe)
DB HiTek renews its IATF 16949 automotive quality management certification, reinforcing its position as a high-value automotive semiconductor foundry. (THE ELEC, Korea Electronics Industry Media)
Policy & Trade
ACM Research is expanding manufacturing in South Korea to serve markets restricted by US export controls, a direct operational response to equipment-trade policy. (The Elec)
Spain eases data-center energy rules and extends compliance timelines, a policy reversal won by hyperscalers pushing back against grid-access restrictions. (Bloomberg Tech)
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